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Impact of positive bias temperature instability (PBTI) on 3T1D-DRAM cells

Autor
Aymerich, N.; Ganapathy, S.; Rubio, A.; Canal, R.; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
Integration. The VLSI journal
Data de publicació
2012-06
Volum
45
Número
3
Pàgina inicial
246
Pàgina final
252
DOI
https://doi.org/10.1016/j.vlsi.2011.11.014 Obrir en finestra nova
URL
http://dl.acm.org/citation.cfm?id=2210829.2210980&coll=DL&dl=GUIDE Obrir en finestra nova
Resum
Memory circuits are playing a key role in complex multicore systems with both data and instructions storage and mailbox communication functions. There is a general concern that conventional SRAM cell based on the 6T structure could exhibit serious limitations in future CMOS technologies due to the instability caused by transistor mismatching as well as for leakage consumption reasons. For L1 data caches the new cell 3T1D DRAM is considered a potential candidate to substitute 6T SRAMs. We first e...
Paraules clau
3T1D-DRAM, 6T-SRAM, Device degradation, PBTI
Grup de recerca
ARCO - Microarquitectura i Compiladors
HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
VIRTUOS - Virtualisation and Operating Systems

Participants