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Fair CPU time accounting in CMP+SMT processors

Autor
Luque, C.; Moreto, M.; Cazorla, F. J.; Valero, M.
Tipus d'activitat
Article en revista
Revista
ACM transactions on architecture and code optimization
Data de publicació
2013-01
Volum
9
Número
4
Pàgina inicial
1
Pàgina final
25
DOI
https://doi.org/10.1145/2400682.2400709 Obrir en finestra nova
URL
http://dl.acm.org/citation.cfm?id=2400709 Obrir en finestra nova
Resum
Processor architectures combining several paradigms of Thread-Level Parallelism (TLP), such as CMP processors in which each core is SMT, are becoming more and more popular as a way to improve performance at a moderate cost. However, the complex interaction between running tasks in hardware shared resources in multi-TLP architectures introduces complexities when accounting CPU time (or CPU utilization) to tasks. The CPU utilization accounted to a task depends on both the time it runs in the proce...
Paraules clau
CPU accounting, Fairness, Multicore/multithreaded processors, Progress, Slowdown
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions

Participants