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Architectural exploration of large-scale hierarchical chip multiprocessors

Autor
Nikitin, N.; San Pedro, J. de; Cortadella, J.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on computer-aided design of integrated circuits and systems
Data de publicació
2013
Volum
32
Número
10
Pàgina inicial
1569
Pàgina final
1582
DOI
https://doi.org/10.1109/TCAD.2013.2272539 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/20442 Obrir en finestra nova
Resum
The continuous scaling of nanoelectronics is increasing the complexity of chip multiprocessors (CMPs) and exacerbating the memory wall problem. As CMPs become more complex, the memory subsystem is organized into more hierarchical structures to better exploit locality. To efficiently discover promising architectures within the rapidly growing search space, exhaustive exploration is replaced with tools that implement intelligent search strategies. Moreover, faster analytical models are preferred t...
Citació
Nikitin, N.; De San Pedro, J.; Cortadella, J. Architectural exploration of large-scale hierarchical chip multiprocessors. "IEEE transactions on computer-aided design of integrated circuits and systems", 2013, vol. 32, núm. 10, p. 1569-1582.
Paraules clau
Analytical modeling chip multiprocessing design space exploration metaheuristics numerical methods
Grup de recerca
ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals

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