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Impact of finfet and III-V/Ge technology on logic and memory cell behavior

Autor
Amat, E.; Calomarde, A.; Garcia, C.; Aymerich, N.; Canal, R.; Rubio, A.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on device and materials reliability
Data de publicació
2013-11-20
Volum
14
Número
1
Pàgina inicial
1
Pàgina final
15
DOI
https://doi.org/10.1109/TDMR.2013.2291410 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/21907 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6670777 Obrir en finestra nova
Resum
In this work, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFET and III-V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robustness against variability and soft error environments.
Citació
Amat, E. [et al.]. Impact of finfet and III-V/Ge technology on logic and memory cell behavior. "IEEE transactions on device and materials reliability", 20 Novembre 2013, vol. 14, núm. 1, p. 1-15.
Paraules clau
Dram, Iii–v Semiconductor Materials, Integrated Circuit Reliability, Ring Oscillators
Grup de recerca
HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
VIRTUOS - Virtualisation and Operating Systems

Participants