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A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM

Autor
Darus, R.; Pou, J.; Konstantinou, G.; Ceballos, S.; Picas, R.; Agelidis, V.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on power electronics
Data de publicació
2015-08-01
Volum
30
Número
8
Pàgina inicial
4119
Pàgina final
4127
DOI
https://doi.org/10.1109/TPEL.2014.2359005 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/76678 Obrir en finestra nova
Resum
This paper introduces a low complexity implementation of the voltage balancing algorithm aiming to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). The proposed algorithm features a relatively simple implementation without any conditional execution requirements and is easily expandable regardless of the number of submodules (SMs). Two modulation techniques are evaluated, namely the staircase modulation and the phase-disposition pulse width modulation (...
Citació
Darus, R., Pou, J., Konstantinou, G., Ceballos, S., Picas, R., Agelidis, V. A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM. "IEEE transactions on power electronics", 01 Agost 2015, núm. 8, p. 4119-4127.
Paraules clau
Capacitor voltage balancing, FUNDAMENTAL SWITCHING FREQUENCY, SYSTEM, modular multilevel converter (MMC), modulation technique, pulse width modulation
Grup de recerca
TIEG - Terrassa Industrial Electronics Group

Participants

  • Darus, Rosheila  (autor)
  • Pou Felix, Josep  (autor)
  • Konstantinou, Georgios  (autor)
  • Ceballos Recio, Salvador  (autor)
  • Picas Prat, Ricard  (autor)
  • Agelidis, Vassilios  (autor)

Arxius