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  • FPGA implementation of a PWM for a three-phase DC-AC multilevel active-clamped converter

     Lupon Roses, Emilio Jose; Busquets Monge, Sergio; Nicolás Apruzzese, Joan
    IEEE transactions on industrial informatics
    Vol. 10, num. 2, p. 1296-1306
    DOI: 10.1109/TII.2014.2309483
    Date of publication: 2014-05
    Journal article

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    With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator

    With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator

  • Analysis of the fault-tolerance capacity of the multilevel active-clamped converter

     Nicolás Apruzzese, Joan; Busquets Monge, Sergio; Bordonau Farrerons, Jose; Alepuz Menendez, Salvador; Calle Prado, Alejandro
    IEEE transactions on industrial electronics
    Vol. 60, num. 11, p. 4773-4783
    DOI: 10.1109/TIE.2012.2222856
    Date of publication: 2013
    Journal article

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    Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active-clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered, and the analysis is carried out under single-device and two simultaneous device faults. Switching strategies and different hardware modifications to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis.

    Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active-clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered, and the analysis is carried out under single-device and two simultaneous device faults. Switching strategies and different hardware modifications to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis.

  • Design and Analysis of a Novel Multilevel Active-Clamped Power-Converter  Open access

     Nicolás Apruzzese, Joan
    Department of Electronic Engineering, Universitat Politècnica de Catalunya
    Theses

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    La tecnología de convertidores multinivel ha recibido un creciente interés en los últimos años debido a sus importantes ventajas con respecto a los convertidores convencionales de dos niveles. Los convertidores multinivel permiten reducir la tensión de bloqueo de cada uno de los semiconductores, además de sintetizar formas de onda con un mejor espectro de armónicos, y en la mayoría de los casos, aumentando la eficiencia del sistema de conversión de energía. Sin embargo, requieren de una mayor cantidad de semiconductores y las estrategias de control y modulación son más complejas. Existen tres topologías básicas de convertidores multinivel: Enclavamiento por diodos, condensadores flotantes y puentes completos conectados en cascada con fuentes independientes de CC. Numerosas configuraciones híbridas combinando las tres topologías básicas y otras topologías multinivel también han sido publicadas en la bibliografía.Una nueva topología multinivel de enclavamiento activo (MAC) es el objeto de estudio de esta tesis. La topología se deriva de la topología multinivel generalizada extrayendo los condensadores flotantes. La topología también se puede ver como una extensión a un número arbitrario de niveles de la topología de tres niveles de enclavamiento activo (ANPC). El nuevo convertidor se controla utilizando un conjunto apropiado de estados de conmutación junto con una adecuada estrategia de transición entre los estados de conmutación, que permiten obtener el máximo beneficio del convertidor.El estudio realizado en la tesis se concentra principalmente en analizar la eficiencia y la capacidad de tolerancia a fallos de la nueva topología de convertidor MAC.El análisis de la eficiencia consta en primer lugar de un estudio de las pérdidas de conducción y las pérdidas de conmutación de los dispositivos de potencia dentro de la topología, seguido de comparaciones analíticas y experimentales de eficiencia entre el convertidor MAC y los convertidores convencionales de dos niveles.En el análisis de la capacidad de tolerancia a fallos se consideren fallos tanto en circuito abierto como en corto circuito, y el análisis se lleva a cabo estudiando fallos de un solo dispositivo y fallos simultáneos de dos dispositivos. Diferentes estrategias de conmutación y variaciones en la topología se proponen en la tesis para superar las limitaciones causadas por los fallos y para incrementar la capacidad de tolerancia a fallos del convertidor MAC.La tesis también propone pautas para garantizar un correcto diseño del convertidor MAC y mejorar su rendimiento.

    Multilevel converter technology has been receiving increasing attention during the last years due to its important advantages compared to conventional two-level conversion. Multilevel converters reduce the voltage across each semiconductor. These converters also synthesize waveforms with better harmonic spectrum, and in most cases, increasing the efficiency of the power conversion system. However, a larger quantity of semiconductors is needed and the modulation strategy to control them becomes more complex. There are three basic multilevel converter topologies: diode clamped, flying capacitor, and cascaded H-bridge with separate dc sources. Numerous hybrid configurations combining them and other multilevel topologies have also been presented in the literature. A novel multilevel active-clamped (MAC) topology is the subject of study of the present thesis. This topology is derived from the generalized multilevel topology by simply removing all flying capacitors. The topology can also be seen as an extension into an arbitrary number of levels of the three-level active neutral-point-clamped (ANPC) topology. The novel converter is controlled using a proper set of switching states and a switching state transition strategy, which permits to obtain the maximum benefits from the converter. In this thesis, the performance and operating capabilities of the MAC topology are studied through comprehensive efficiency and fault-tolerance analyses. The efficiency analysis comprises a study of power-device conduction and switching losses in the topology, followed by analytical and experimental efficiency comparisons between the MAC converter and conventional two-level converters. In the analysis of the fault-tolerance capacity of the MAC topology both open- and short-circuit faults are considered and the analysis is carried out under single-device and two-simultaneous-device faults. Switching strategies to overcome the limitations caused by faults and topology variations to increment the fault-tolerance ability of the MAC converter are proposed. The thesis also proposes guidelines to guarantee a proper MAC converter design and improve its performance.

  • Predictive current control of a back-to-back NPC wind energy conversion system to meet low voltage ride-through requirements

     Alepuz Menendez, Salvador; Calle Prado, Alejandro; Busquets Monge, Sergio; Nicolás Apruzzese, Joan; Bordonau Farrerons, Jose
    Annual Conference of the IEEE Industrial Electronics Society
    p. 5304-5309
    Presentation's date: 2013-11-13
    Presentation of work at congresses

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    Predictive current control is applied to a wind energy conversion system implemented with a permanent-magnet synchronous generator connected to the grid through a back-toback neutral-point-clamped converter. This control approach allows to work in steady-state and to fulfill the low-voltage ride through requirements demanded by the power system operators. Dc-link neutral point voltage balance is also achieved by means of the predictive control algorithm.

    Predictive current control is applied to a wind energy conversion system implemented with a permanent-magnet synchronous generator connected to the grid through a back-toback neutral-point-clamped converter. This control approach allows to work in steady-state and to fulfill the low-voltage ride through requirements demanded by the power system operators.Dc-link neutral point voltage balance is also achieved by means of the predictive control algorithm.

  • Experimental efficiency comparison between a four-level active-clamped and a two-level topology

     Nicolás Apruzzese, Joan; Busquets Monge, Sergio; Bordonau Farrerons, Jose; Alepuz Menendez, Salvador; Calle Prado, Alejandro; Filbà Martínez, Àlber
    Annual Conference of the IEEE Industrial Electronics Society
    p. 6225-6230
    Presentation's date: 2013-11-11
    Presentation of work at congresses

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    This paper presents an efficiency analysis of a recently-published topology, the multilevel-active-clamped (MAC) topology. In order to assess the MAC topology, an efficiency comparison between a four-level MAC leg and a conventional two-level leg operating in low voltage is carried out. First, overall losses of both topologies are estimated. Then, experimental tests to measure their overall losses and their efficiency are presented. Finally, obtained results from the experimental tests are compared with the estimations to substantiate the analysis. The efficiency of the MAC topology is higher in all the switching-frequency range.

    This paper presents an efficiency analysis of a recently-published topology, the multilevel-active-clamped (MAC) topology. In order to assess the MAC topology, an efficiency comparison between a four-level MAC leg and a conventional two-level leg operating in low voltage is carried out. First, overall losses of both topologies are estimated. Then, experimental tests to measure their overall losses and their efficiency are presented. Finally, obtained results from the experimental tests are compared with the estimations to substantiate the analysis. The efficiency of the MAC topology is higher in all the switching-frequency range.

  • A multilevel active-clamped converter topology¿Operating principle

     Busquets Monge, Sergio; Nicolás Apruzzese, Joan
    IEEE transactions on industrial electronics
    Vol. 58, num. 9, p. 3868-3878
    DOI: 10.1109/TIE.2010.2098376
    Date of publication: 2011-09
    Journal article

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    This paper presents a novel multilevel activeclamped converter topology, which is an extension to m levels of the three-level active neutral-point-clamped topology. The operating principle is established through the definition of a proper set of switching states and a transition strategy between adjacent switching states. The benefits of the proposed converter topology and control in comparison to alternative multilevel converter topologies are discussed. The simulation and experimental results of a simple four-level dc–dc converter configuration are presented to illustrate the converter performance features. The experimental results of a four-level three-phase dc–ac converter are also presented to further validate the proposed topology and operating principle.

  • Técnicas avanzadas de convertidores electrónicos de potencia multinivel de ca aplicadas al uso racional de la energía eléctrica

     Alepuz Menendez, Salvador; Busquets Monge, Sergio; Calle Prado, Alejandro; Nicolás Apruzzese, Joan; Peracaula Roura, Joan; Bordonau Farrerons, Jose
    Competitive project

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  • Design issues of the multilevel active-clamped converter

     Nicolás Apruzzese, Joan; Busquets Monge, Sergio; Bordonau Farrerons, Jose
    Annual Conference of the IEEE Industrial Electronics Society
    p. 4256-4261
    DOI: 10.1109/IECON.2011.6120034
    Presentation's date: 2011-11-08
    Presentation of work at congresses

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    This paper studies several design issues of the multilevel active-clamped (MAC) topology. Several guidelines are proposed to guarantee a proper MAC converter design and improve its performance. The inclusion of a resistor network to balance the blocking voltage of devices when the converter is in OFF state, the use of self-powered gate-driver power-supplies, or the definition of a shut-down sequence to avoid possible device failures are some of the proposals. This paper also studies the singular device current spikes that appear in the MAC topology during switching state transitions. These spikes occur owing to diode reverse recovery and to the discharging of the device output parasitic capacitances. A proper device selection reduces these current peaks, decreasing the switching losses and the converter electromagnetic interference. Experimental tests are carried out with a four-level MAC prototype to validate the analysis.

  • Fault-tolerance capacity of the multilevel active-clamped topology

     Nicolás Apruzzese, Joan; Busquets Monge, Sergio; Bordonau Farrerons, Jose; Alepuz Menendez, Salvador; Calle Prado, Alejandro
    IEEE Energy Conversion Congress and Exposition
    p. 3411-3418
    DOI: 10.1109/ECCE.2011.6064230
    Presentation's date: 2011-09-22
    Presentation of work at congresses

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    Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered and the analysis is carried out under single-device and two-simultaneous-device faults. Switching strategies to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis.

  • Fault-tolerance capacity of the multilevel active clamped topology

     Nicolás Apruzzese, Joan; Busquets Monge, Sergio; Bordonau Farrerons, Jose; Alepuz Menendez, Salvador; Calle Prado, Alejandro
    IEEE Energy Conversion Congress and Exposition
    p. 3411-3418
    DOI: 10.1109/ECCE.2011.6064230
    Presentation's date: 2011
    Presentation of work at congresses

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    Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered and the analysis is carried out under single-device and two-simultaneous-device faults. Switching strategies to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis.

  • An m-level active-clamped converter topology - Operating principle

     Busquets Monge, Sergio; Nicolás Apruzzese, Joan
    IEEE International Symposium on Industrial Electronics
    p. 3211-3217
    DOI: 10.1109/ISIE.2010.5637588
    Presentation's date: 2010-07-07
    Presentation of work at congresses

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  • Advanced Wide Band Gap Semiconductor Devices for Rational Use of Energy (RUE)

     Alepuz Menendez, Salvador; Busquets Monge, Sergio; Calle Prado, Alejandro; Nicolás Apruzzese, Joan; Peracaula Roura, Joan; Filbà Martínez, Àlber; Bordonau Farrerons, Jose
    Competitive project

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  • DISEÑO E IMPLEMENTACIÓN DE NANOREDES PARA APLICACIONES DOMÉSTICAS, COMERCIALES..

     Alepuz Menendez, Salvador; Busquets Monge, Sergio; Calle Prado, Alejandro; Nicolás Apruzzese, Joan; Bordonau Farrerons, Jose
    Competitive project

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  • Access to the full text
    2 transistors + 2 diodes-based PEBB designed for general applications in power electronics  Open access

     Nicolás Apruzzese, Joan; Rocabert Delgado, Joan; Bordonau Farrerons, Jose; Busquets Monge, Sergio; Alepuz Menendez, Salvador; Martinez Velasco, Juan Antonio; Peracaula Roura, Joan
    European Conference on Power Electronics and Applications
    p. 1-10
    Presentation's date: 2009-09
    Presentation of work at congresses

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    This paper presents a new Power Electronic Building Block (PEBB) designed to facilitate the implementation of different power converter topologies. The proposed PEBB consists of two diodes and two transistors and it can be used to implement the most relevant power converter topologies, due to its modularity. The addition of the two diodes is an exclusive feature of the new PEBB, which permits to implement neutral point clamped (NPC) multilevel converters. The application of the PEBB to build a three-level NPC converter and a dc-dc push-pull converter is presented and detailed in the paper, and demonstrate that the presented PEBB can be useful to shorten converter development times.

  • Access to the full text
    A novel pulsewidth modulation to operate a bidirectional two-stage dc-ac converter with high-frequency isolation in discontinuous conduction mode for photovoltaic applications  Open access

     Mata Dumenjó, Montserrat; Busquets Monge, Sergio; Diest, Jaume; Rocabert Delgado, Joan; Barenys, Mireia; Nicolás Apruzzese, Joan; Salaet Pereira, Juan Fernando
    European Conference on Power Electronics and Applications
    p. 1-8
    Presentation's date: 2009-09
    Presentation of work at congresses

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    This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder

    Postprint (author’s final draft)

  • SUCCESS. Searching Unprecedented Cooperations on Climate and Energy to ensure Sustainability

     Bordonau Farrerons, Jose; Alepuz Menendez, Salvador; Busquets Monge, Sergio; Calle Prado, Alejandro; Nicolás Apruzzese, Joan; Peracaula Roura, Joan; Sumper, Andreas
    Competitive project

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  • Nuevas técnicas de conversión electrónica de potencia en ca para aplicaciones de generación distribuida y accionamientos de ca.

     Busquets Monge, Sergio; Bordonau Farrerons, Jose; Calle Prado, Alejandro; Nicolás Apruzzese, Joan; Rocabert Delgado, Joan
    Competitive project

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