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Thread partitioning and value prediction for exploiting speculative thread-level parallelism

Autor
Marcuello, P.; Gonzalez, A.; Tubella, J.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on computers
Data de publicació
2004-02
Volum
53
Número
2
Pàgina inicial
114
Pàgina final
125
DOI
https://doi.org/10.1109/TC.2004.1261823 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/101437 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/document/1261823/ Obrir en finestra nova
Resum
Speculative thread-level parallelism has been recently proposed as a source of parallelism to improve the performance in applications where parallel threads are hard to find. However, the efficiency of this execution model strongly depends on the performance of the control and data speculation techniques. Several hardware-based schemes for partitioning the program into speculative threads are analyzed and evaluated. In general, we find that spawning threads associated to loop iterations is the m...
Citació
Marcuello, P., Gonzalez, A., Tubella, J. Thread partitioning and value prediction for exploiting speculative thread-level parallelism. "IEEE transactions on computers", Febrer 2004, vol. 53, núm. 2, p. 114-125.
Paraules clau
Branch prediction, Clustered architectures, Speculative thread-level parallelism, Thread spawning policies, Value prediction
Grup de recerca
ARCO - Microarquitectura i Compiladors

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