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A proposal for task parallelism in OpenMP

Autor
Ayguade, E.; Nawal, C.; Duran, A.; Hoeflinger, J.; Yuan, L.; Massaioli, F.; Ernesto, S.; Unnikrishnan, P.; Guansong, Z.
Tipus d'activitat
Article en revista
Revista
Lecture notes in computer science
Data de publicació
2007-06
Volum
4935
Número
1
Pàgina inicial
1
Pàgina final
12
DOI
https://doi.org/10.1007/978-3-540-69303-1_1 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/28406 Obrir en finestra nova
URL
http://link.springer.com/chapter/10.1007%2F978-3-540-69303-1_1 Obrir en finestra nova
Resum
Ease of programming is one of the main impediments for the broad acceptance of multi-core systems with no hardware support for transparent data transfer between local and global memories. Software cache is a robust approach to provide the user with a transparent view of the memory architecture; but this software approach can suffer from poor performance. In this paper, we propose a hierarchical, hybrid software-cache architecture that targets enabling pre-fetch techniques. Memory accesses are cl...
Citació
Vujic, N. [et al.]. Automatic pre-fetch and modulo scheduling transformations for the cell BE architecture. "Lecture notes in computer science", Gener 2008, vol. 5335, p. 31-46.
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions

Participants

  • Ayguade Parra, Eduard  (autor)
  • Nawal, Copty  (autor)
  • Duran González, Alejandro  (autor)
  • Hoeflinger, Jay  (autor)
  • Yuan, Lin  (autor)
  • Massaioli, Federico  (autor)
  • Ernesto, Su  (autor)
  • Unnikrishnan, Priya  (autor)
  • Guansong, Zhang  (autor)