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Control speculation for energy-efficient next-generation superscalar processors

Autor
Aragon, J.; González, J.; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on computers
Data de publicació
2006-03
Volum
55
Número
3
Pàgina inicial
281
Pàgina final
291
DOI
https://doi.org/10.1109/TC.2006.32 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/100841 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=1583558 Obrir en finestra nova
Resum
Conventional front-end designs attempt to maximize the number of "in-flight" instructions in the pipeline. However, branch mispredictions cause the processor to fetch useless instructions that are eventually squashed, increasing front-end energy and issue queue utilization and, thus, wasting around 30 percent of the power dissipated by a processor. Furthermore, processor design trends lead to increasing clock frequencies by lengthening the pipeline, which puts more pressure on the branch predict...
Citació
Aragón, J., González, J., González, A. Control speculation for energy-efficient next-generation superscalar processors. "IEEE transactions on computers", Març 2006, vol. 55, núm. 3, p. 281-291.
Paraules clau
Control Speculation, Energy-aware Systems, Low-power Design, Processor Architecture
Grup de recerca
ARCO - Microarquitectura i Compiladors

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