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Prebond testing of weak defects in TSVs

Autor
Arumi, D.; Rodriguez-Montanes, R.; Figueras, J.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on very large scale integration (VLSI) systems
Data de publicació
2015-08-07
Volum
PP
Número
99
Pàgina inicial
31
Pàgina final
36
DOI
https://doi.org/10.1109/TVLSI.2015.2448594 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/78462 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7182374 Obrir en finestra nova
Resum
Through-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process to prevent stacking yield loss. Thus, the development of effective prebond testing techniques becomes of great importance. In this direction, recent research effort has been devoted to the development of two main prebond techniques: 1) prebond probing and 2) built-in self-test (B...
Citació
Arumi, D., Rodriguez, R., Figueras, J. Prebond testing of weak defects in TSVs. "IEEE transactions on very large scale integration (VLSI) systems", 07 Agost 2015, vol. PP, núm. 99, p. 31-36.
Paraules clau
Built-in self-test, Built-in self-test (BIST), Circuit faults, Circuit stability, Inverters, Stability analysis, Through-silicon vias, design for testability, integrated circuit (IC) testing
Grup de recerca
CRnE - Centre de Recerca en Ciència i Enginyeria Multiescala de Barcelona
QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat

Participants