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Scientific and technological production

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  • Arquitectura de Computadors d'Altes Prestacions (ACAP)

     Olive, A.; Alex Ramirez; Llosa, J.; Sanchez, F.; Jimenez, M.; Fernandez, A.; Jimenez, D.; Alvarez, C.; Morancho, E.; Moreto, M.; Palomar, O.; Carpenter, P.; Monreal, T.; Valero, M.
    Competitive project
  • Non-speculative enhancements for the scheduling logic

     Gran, R.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • ARQUITECTURA DE COMPUTADORS D'ALTRES PRESTACIONS (CAP)

     Jimenez, M.; Pericas, M.; Navarro, J.; Llaberia, J.; Llosa, J.; Villavieja, C.; Alvarez, C.; Jimenez, D.; Alex Ramirez; Morancho, E.; Fernandez, A.; Pajuelo, M.A.; Olive, A.; Sanchez, F.; Moreto, M.; Verdu, J.; Abella, J.; Valero, M.
    Competitive project
  • On reducing misspeculations on a pipelined scheduler  Open access

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    IEEE International Parallel and Distributed Processing Symposium
    p. 1-12
    DOI: 10.1109/IPDPS.2009.5160990
    Presentation's date: 2009-05
    Presentation of work at congresses
    Access to the full text
  • On Tolerating the Scheduling-Loop Latency

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Date: 2007-10
    Report
  • On Reducing Energy-Consumption by Late-Inserting Instructions into the Issue Queue

     Morancho, E.; Llaberia, J.; Olive, A.
    International Symposium on Low Power Electronics and Design
    p. 371-374
    Presentation's date: 2007-08-29
    Presentation of work at congresses
  • A comparison of two policies for issuing instructions speculatively

     Morancho, E.; Llaberia, J.; Olive, A.
    Journal of systems architecture
    Vol. 53, num. 4, p. 170-183
    Date of publication: 2007-04
    Journal article
  • On Improving a Pipelined Scheduling Logic

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    XVIII Jornadas de Paralelismo. CEDI 2007 II Congreso Español de Informática.
    p. 75-82
    Presentation of work at congresses
  • On improving a pipelined scheduling logic

     Ruben, G.; Morancho, E.; Llaberia, J.; Olive, A.
    XVIII Jornadas de Paralelismo. CEDI 2007 II Congreso Español de Informática.
    p. 1
    Presentation of work at congresses
  • La Lógica de Lanzamiento a Ejecución de Instrucciones

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Date: 2006-10
    Report
  • Planificador por Niveles de Dependencia

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Date: 2006-10
    Report
  • An Enchancement for a Scheduling Logic Pipelined over two Cycles

     Olive, A.
    Jornadas de Paralelismo
    Presentation's date: 2006-09-18
    Presentation of work at congresses
  • Non-Speculative Enhancements for a Pipelined Scheduling Logic

     Olive, A.
    Second International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2006)
    Presentation's date: 2006-07-26
    Presentation of work at congresses
  • An Enhancement for a Sceduling Logic Pipelined over two Cycles

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Date: 2006-07
    Report
  • On Tolerating the Scheduling-Loop Latency Non-Speculatively

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Date: 2006-07
    Report
  • An Enhancement for a Scheduling Logic Pipelined over two Cycles

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    ICCD 2006 XXIV IEEE International Conference on Computer Design
    p. 203-209
    Presentation of work at congresses
  • Non-Speculative Enhancements for a Pipelined Scheduling Logic

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Second International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2006)
    p. 1-4
    Presentation of work at congresses
  • Predicting L2 Misses to Increase Issue-Queue Efficacy

     Morancho, E.; Llaberia, J.; Olive, A.
    4th Workshop on Memory Performance Issues (WMPI-2006) in conjunction with the 12th International Symposium on High-Performance Computer Architecture (HPCA-12)
    p. 29-35
    Presentation of work at congresses
  • An Enhancement for a Scheduling Logic Pipelined over two Cycles

     Gran, R.; Morancho, E.; Olive, A.; Llaberia, J.
    Jornadas de Paralelismo
    p. 1-6
    Presentation of work at congresses
  • A Mechanism for Verifying Data Speculation

     Olive, A.
    European Conference on Parallel Computing
    Presentation's date: 2004-08-31
    Presentation of work at congresses
  • A Mechanism for Verifying Data Speculation

     Morancho, E.; Llaberia, J.; Olive, A.
    Lecture notes in computer science
    Vol. 1, num. 3149, p. 525-534
    Date of publication: 2004-08
    Journal article
  • A Mechanism for Verifying Data Speculation

     Morancho, E.; Llaberia, J.; Olive, A.
    European Conference on Parallel Computing
    p. 525-534
    Presentation of work at congresses
  • Address Prediction and Recovery Mechanisms  Open access

     Morancho, E.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Recovery mechanism for latency misprediction

     Morancho, E.; Olive, A.; Llaberia, J.
    Date: 2001-11
    Report
  • Recovery Mechanism for Latency Mispredictions

     Olive, A.
    International Conference on Parallel Architectures and Compilation Techniques
    Presentation's date: 2001-09-08
    Presentation of work at congresses
  • Recovery Mechanism for Latency Misprediction

     Morancho, E.; Llaberia, J.; Olive, A.
    International Conference on Parallel Architectures and Compilation Techniques
    p. 118-128
    Presentation of work at congresses
  • Two-Level Address Storage and Address Prediction

     Morancho, E.; Llaberia, J.; Olive, A.
    European Conference on Parallel Computing
    p. 960-964
    Presentation of work at congresses
  • Two-Level Address Storage and Address Prediction

     Morancho, E.; Olive, A.; Llaberia, J.
    Date: 1999-10
    Report
  • Discrete Last-Address Predictor

     Morancho, E.; Olive, A.; Llaberia, J.
    Date: 1999-01
    Report
  • Two-Level Address Storage and Address Prediction

     Morancho, E.; Llaberia, J.; Olive, A.
    X Jornadas de Paralelismo
    p. 29-37
    Presentation of work at congresses
  • Looking at History to Filter Allocations in Prediction Tables

     Morancho, E.; Llaberia, J.; Olive, A.
    International Conference on Parallel Architectures and Compilation Techniques
    p. 314-319
    Presentation of work at congresses
  • Split Last-Address Predictor

     Morancho, E.; Olive, A.; Llaberia, J.
    Date: 1998-05
    Report
  • Split Last Address Predictor

     Morancho, E.; Llaberia, J.; Olive, A.
    International Conference on Parallel Architectures and Compilation Techniques
    p. 230-239
    Presentation of work at congresses
  • One-Cycle Zero-Offset Loads

     Morancho, E.; Llaberia, J.; Olive, A.; Jimenez, M.
    European Parallel and Distributed Systems (Euro-PDS´98)
    p. 87-93
    Presentation of work at congresses
  • Split Last-Address Predictor

     Morancho, E.; Llaberia, J.; Olive, A.
    IX Jornadas de Paralelismo
    p. 275-282
    Presentation of work at congresses
  • Reducing the influence of Memory Access Instructions on Stall Cycles

     Morancho, E.; Olive, A.; Llaberia, J.; Jimenez, M.
    Date: 1997-06
    Report
  • Reducing the influence of memory access instructions on stall cycles

     Morancho, E.; Llaberia, J.; Olive, A.; Jimenez, M.
    Jornadas de Paralelismo
    p. 161-170
    Presentation of work at congresses
  • Introducción a los lenguajes máquina y ensamblador del VAX-II

     Ayguade, E.; Borensztjen, P.; Del Corral, A.; Gallego, M.I.; Olive, A.; Sanchez, F.; Torres, J.
    Date of publication: 1992-10
    Book
  • ANÀLISI DE MEMÒRIES CACHE D'INSTRUCCIONS NO CONVENCIONALS.

     Olive, A.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses