This paper presents the implementation of a speaker-verification system on field programmable gate array. The algorithm is executed by software over an embedded system that includes a MicroBlaze microprocessor connected to a vector floating-point unit (VFPU). The VFPU is designed to speed up the resolution of any vector floating-point operation involved in the verification algorithm, whereas the microprocessor manages the control of the process and executes the rest of operations. With a clock frequency of 40 MHz, the system is capable of executing the complete algorithm in real time, processing a voice frame in 9.1 ms. The same verification process was carried out for two different systems: 1) an ARM Cortex A8 microprocessor; and 2) configuring
MicroBlaze with the scalar floating-point unit provided by Xilinx. The experimental results show that when comparing our proposed system against both systems, the number of clock cycles is reduced by a factor of 11.2× and 15.4×, respectively. The main advantage of the VFPU is its flexibility, which allows quick adaptation of the software to the potential changes produced in both the system and the user requirements. The algorithm was tested over a public database that contains the utterances of different users acquired under different environmental conditions, providing good recognition rates.
This paper describes the implementation on field-programmable gate arrays (FPGAs) of an embedded system for online signature verification. The recognition algorithm mainly consists of three stages. First, an initial preprocessing is applied on the captured signature, removing noise and normalizing information related to horizontal and vertical positions. Afterwards, a dynamic time warping algorithm is used to align this processed signature with its template previously stored in a database. Finally, a set of features are extracted and passed through a Gaussian Mixture Model, which reveals the degree of similarity between both signatures. The algorithm was tested using a public database of 100 users, obtaining high recognition rates for both genuine and forgery signatures. The implemented system consists of a vector floating-point unit (VFPU), specifically designed for accelerating the floating-point computations involved in this biometric modality. Moreover, the proposed architecture also includes a microprocessor, which interacts with the VFPU, and executes by software the rest of the online signature verification process. The designed system is capable of finishing a complete verification in less than 68 ms with a clock rated at 40 MHz. Experimental results show that the number of clock cycles is accelerated by a factor of x4.8 and x11.1, when compared with systems based on ARM Cortex-A8 and when substituting the VFPU by the Floating-Point Unit provided by Xilinx, respectively.
This paper presents a sliding mode control design of a multiphase power converter. The use of multiphase converters and an appropriate phase shift result in chattering reduction to the desired level at a given switching frequency in the so called “ripple cancellation” or “harmonic cancellation”. Additionally, this strategy considers sliding mode as a suitable substitute for Pulse Width Modulation because of the benefits in sliding mode control, i.e. the possibility of achieving desired system responses regardless of parameter changes. A 4-phase buck converter prototype was built and the controller was programmed in an FPGA. Experimental results show that chattering reduction, robust output regulation and phase current equalization are achieved, thus validating the proposed approach.
Nowadays, biometrics is considered as a promising solution in the market of security and personal verification. Applications such as financial transactions, law enforcement or network management security are already benefitting from this technology. Among the different biometric modalities, speaker verification represents an accurate and efficient way of authenticating a person’s identity by analyzing his/her voice. This identification method is especially suitable in real-life scenarios or when a remote recognition over the phone is required. The processing of a signal of voice, in order to extract its unique features, that allows distinguishing an individual to confirm or deny his/her identity is, usually, a process characterized by a high computational cost. This complexity imposes that many systems, based on microprocessor clocked at hundreds of MHz, are unable to process samples of voice in real-time. This drawback has an important effect, since in general, the response time needed by the biometric system affects its acceptability by users. The design based on FPGA (Field Programmable Gate Arrays) is a suited way to implement systems that require a high computational capability and the resolution of algorithms in real-time. Besides, these devices allow the design of complex digital systems with outstanding performance in terms of execution time. This paper presents the implementation of a MFCC (Mel-Frequency Cepstrum Coefficients)—SVM (Support Vector Machine) speaker verification system based on a low-cost FPGA. Experimental results show that our system is able to verify a person’s identity as fast as a high-performance microprocessor based on a Pentium IV personal computer.
Many image-processing algorithms require several stages to be processed that cannot be resolved by embedded microprocessors in a reasonable time, due to their high-computational cost. A set of dedicated coprocessors can accelerate the resolution of these algorithms, although the main drawback is the area needed for their implementation. The main advantage of a reconfigurable system is that several coprocessors designed to perform different operations can be mapped on the same area in a time-multiplexed way. This work presents the architecture of an embedded system composed of a microprocessor and a run-time reconfigurable coprocessor, mapped on Spartan-3, the low-cost family of Xilinx FPGAs. Designing reconfigurable systems on Spartan-3 requires much design effort, since unlike higher cost families of Xilinx FPGAs, this device does not officially support partial reconfiguration. In order to overcome this drawback, the paper also describes the main steps used in the design flow to obtain a successful design. The main goal of the presented architecture is to reduce the coprocessor reconfiguration
time, as well as accelerate image-processing algorithms. The experimental results demonstrate significant improvement in both objectives. The reconfiguration rate nearly achieves 320 Mb/s which is far superior to the previous related works.
Nowadays, the road safety is one of the most important priorities in the automotive industry. Many times, this safety is jeopardized because of driving under inappropriate states, e.g. drowsiness, drugs and/or alcohol. Therefore several systems for monitoring the behavior of subjects during driving are researched. In this paper, a device based on a contactless electrical bioimpedance system is shown. Using the four-wire technique, this system is capable of obtaining the heart rate and the ventilation of the driver through multiple textile electrodes. These textile electrodes are placed on the car seat and the steering wheel. Moreover, it is also reported several measurements done in a controlled environment, i.e. a test room where there are no artifacts due to the car vibrations or the road state. In the mentioned measurements, the system response can be observed depending on several parameters such as the placement of the electrodes or the number of clothing layers worn by the driver.
Two different approaches to achieve robustness with respect to the input voltage, the reference voltage and the load variations in a step-down multiphase power converter are presented in this paper. The proposal allows both to regulate the output voltage to a given reference and to minimize the current ripple. Design is validated by means of simulation results.
En este trabajo se presenta la experiencia didáctica desarrollada por los
profesores de la Universidad Politécnica de Cataluña y la Universidad Rovira i Virgili
con relación a los dispositivos FPGA (Field Programmable Gate Array) y su actual
aplicación tecnológica. En este sentido se expone un conjunto de experiencias prácticas
que permiten al estudiante profundizar en el diseño del sistemas de instrumentación
y control basados en dispositivos FPGA’s. Las experiencias presentadas forman
parte del contenido de la asignatura “Sistemas Digitales de Instrumentación y Control”
que se oferta actualmente como asignatura optativa en la Escuela Politécnica
Superior de Ingeniería de Vilanova y la Geltrú (UPC).
Los sistemas biométricos caracterizados por su alto nivel de seguridad se
implementan habitualmente con sistemas procesadores de altas prestaciones como los
ordenadores personales. Estos procesadores trabajan en un rango de frecuencias de
GHz que les permiten realizar millones de operaciones por segundo, de forma que
pueden ejecutar en tiempo real complejos algoritmos de verificación. Sin embargo,
esta solución de implementación tiene el inconveniente del elevado coste. La utilización
de dispositivos programables del tipo FPGA (Field Programmable Gate Array)
permite obtener a bajo coste soluciones a medida con las que se consiguen elevadas
velocidades de proceso similares a los sistemas μP de altas prestaciones. En este artículo
se presenta el diseño e implementación sobre una FPGA de un sistema de verificación
de locutor basado en los coeficientes Mel-Cepstrum y en un algoritmo de clasificación
SVM (Support Vector Machines). Los resultados experimentales obtenidos
con el diseño propuesto muestran una velocidad de proceso equiparable a la conseguida
con un ordenador personal basado en el μP Pentium IV.
El trabajo presentado describe la arquitectura de un sistema embedido,
compuesto por el microprocesador Microblaze y un coprocesador dinámico, sobre la
familia FPGA de bajo coste Spartan-3. El principal objetivo es la rápida reconfiguración
del coprocesador, que además permite una eficiente aceleración en la ejecución
de algoritmos de procesado de imagen. Los resultados experimentales demuestran una
notable mejora en la velocidad de reconfiguración en comparación con los trabajos
anteriormente publicados sobre esta temática, así como una eficiente aceleración de
este tipo de algoritmos.
Complex algorithms usually require several computation
stages. Many embedded microprocessors have not enough
computational performance to resolve these algorithms in a
reasonable time, so dedicated coprocessors accelerate them
although the main drawback is the area devoted to them. A
reconfigurable coprocessor can drastically reduce the area,
since it accommodates a set of coprocessors whose
execution is multiplexed on time, although the
reconfiguration speed reduces the overall system
performance. Although self-reconfigurable systems are
possible on Spartan-3 FPGAs, it requires a hard design
task due to the lack of software and hardware support
available on higher-cost families. This paper describes the
architecture of a fast self-reconfigurable embedded system
mapped on Spartan-3, used as computation platform to
solve a complex algorithm, such as the image-processing
carried out in a fingerprint biometric algorithm. In order to
reduce the reconfiguration time, the system uses our
custom-made memory and reconfiguration controllers.
Moreover, the dynamic coprocessor can access directly to
external memory through our memory controller to
improve processing time.
Biometric systems, characterized by their high confidential
levels of security, are usually based on high-performance
microprocessors implemented on personal computers.
These advanced devices contain floating-point units able to
carry out millions of operations per second at frequencies in
the GHz range, being qualified to resolve the most complex
algorithms in just a few hundred of milliseconds. However,
their main drawback is the cost, and the necessary space
required to incorporate their external associated peripherals.
This disadvantage is especially significant in the low-cost
consumer market, where factors such as price and size
determine the viability of a product. The use of an FPGA is
a suited way to implement systems that require a high
computational capability at affordable prices. Besides, these
devices allow the design of complex digital systems with
outstanding performances in terms of execution times. This
paper presents the implementation of a SVM (Support
Vector Machines) speaker verification system on a low-cost
FPGA. Experimental results show as our system is able to
verify a person’s identity as fast as a high-performance
microprocessor based on a Pentium IV personal computer.
En este trabajo se presenta la experiencia didáctica desarrollada por profesores de la Universidad Politécnica de Cataluña con relación a las energías renovables y su actual aplicación tecnológica. En este sentido se indica el programa de teoría y prácticas de la asignatura "Sistemas Electrónicos de Potencia para Energías Renovables" que se oferta actualmente como asignatura optativa en la Escuela Politécnica Superior de Ingeniería de Vilanova i la Geltrú. Las prácticas de la asignatura se basan en el uso del programa de libre acceso Virtual Test Bed.