Busquets-Monge, S.; Maheshwari, R.; Nicolas-Apruzzese, J.; Lupon, E.; Munk, S.; Bordonau, J. IEEE transactions on industrial electronics Vol. 62, num. 5, p. 2663-2672 DOI: 10.1109/TIE.2014.2363820 Data de publicació: 2015-05-01 Article en revista
This paper presents a capacitor voltage balancing control applicable to any multilevel dc-ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc-ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc-ac conversion system.
Lupon, E.; Busquets-Monge, S.; Nicolas-Apruzzese, J. IEEE transactions on industrial informatics Vol. 10, num. 2, p. 1296-1306 DOI: 10.1109/TII.2014.2309483 Data de publicació: 2014-05 Article en revista
With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator
Balado, L.; Lupon, E.; Figueras, J.; Roca, M.; Isern, E.; Picos, R. IEEE transactions on circuits and systems I: regular papers Vol. 56, num. 4, p. 754-762 DOI: 10.1109/TCSI.2008.2004342 Data de publicació: 2009-04 Article en revista
Flottes, M.; Bertrand, Y.; Balado, L.; Lupon, E.; Biasizzo, A.; Novak, F.; Carlo, D.; Prinetto, P.; Pricopi, N.; Wunderlich, H. IEEE International Workshop on Electronic Design, Test and Applications p. 1 Presentació treball a congrés