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  • Proposal and development of a highly modular and scalable self-adaptive hardware architecture with parallel processing capability  Open access

     Soto Vargas, Javier Evandro
    Department of Electronic Engineering, Universitat Politècnica de Catalunya
    Theses

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    Esta tesis doctoral describe una arquitectura de hardware auto-adaptable novedosa y no convencional con capacidad de procesamiento en paralelo. Por razones de escalabilidad, esta arquitectura bioinspirada está basada en una matriz regular de células homogéneas. La arquitectura propuesta es programable, e implementa de manera distribuida diversas capacidades auto-adaptables incluyendo el auto-emplazamiento y auto-enrutamiento, los cuales debido a su diseño intrínseco, permiten el desarrollo de sistemas reconfigurables en tiempo de ejecución, así como de sistemas auto-reparables y/o con capacidades de tolerancia a fallos. La implementación física de esta arquitectura esta compuesta de dos capas, que incluyen células interconectadas en el primer nivel y matrices de conmutación y pines en el segundo nivel. La célula es el elemento básico de la arquitectura propuesta. Cualquier aplicación que se quiera programar en el sistema debe estar organizada en componentes, donde cada componente está compuesto por una o más células interconectadas. La interconexión de células dentro de un componente es realizado en el mismo nivel de la matriz de células, mientras que la interconexión de componentes es realizada en la segunda capa. Adicionalmente, se definen dos capas conceptuales que son usadas con propósitos organizativos en aplicaciones de propósito general, estas son: el SANE y el SANE-assembly (o conjunto de SANEs). La entidad auto-adaptable interconectada o SANE está compuesta por un grupo de componentes. Este es el sistema de computación auto-adaptable básico, el cual tiene la habilidad de monitorizar su entorno local y su proceso de computación interno.Las capacidades de procesamiento de la célula están incluidas en su unidad funcional (FU). Esta puede ser definida como un multicomputador configurable con cuatro núcleos, los cuales son agrupados o no dependiendo del modo de configuración. La FU tiene doce modos de configuración programables, por lo que cada célula permite seleccionar entre uno y cuatro procesadores trabajando en paralelo con diversas capacidades en las memorias de programa y datos. Las capacidades auto-adaptables de la célula son ejecutadas principalmente por la unidad de configuración de la célula (CCU). El algoritmo de auto-emplazamiento es el encargado de encontrar la posición mas adecuada dentro de la matriz de células para insertar la nueva célula de un componente. El algoritmo de auto-enrutamiento permite interconectar los puertos de las FU de dos células. Los procesos de auto-emplazamiento y auto-enrutamiento permiten realizar en tiempo real cambios funcionales complejos; estos procesos dotan al sistema de una mayor funcionalidad, permitiendo que el sistema cambie por si mismo, lo que permite la implementación de la auto-configuración en tiempo real, sin la necesidad de ningún gestor de configuración.La arquitectura propuesta incluye dos mecanismos de tolerancia a fallos. Uno de estos es una técnica escalonada y dinámica de tolerancia a fallos, que tiene la habilidad de crear y eliminar copias redundantes de la unidad funcional (o de cómputo) de una aplicación específica. El otro mecanismo de tolerancia a fallos es el Sistema de Tolerancia a Fallos dedicado o estático. Este provee capacidades de procesamiento redundante que están en funcionamiento continuamente. Cuando un fallo en la ejecución de un programa es detectado, los procesadores de la célula son detenidos y los procesos de auto-eliminación y auto-replicación se inician para la célula (o células) implicada en el fallo. Se desarrolló un prototipo basado en FPGAs y una herramienta de software para comprobar la funcionalidad del sistema. El prototipo incluye todas las características de los sistemas auto-adaptable descritas en este trabajo. El SANE Project developer (SPD) es un ambiente integrado de desarrollo (IDE) que permite generar y descargar la memoria de inicialización de datos para el Microprocesador de Control dentro del prototipo.

    This dissertation describes a novel unconventional self-adaptive hardware architecture with capacity for parallel processing. For scalability issues, this bioinspired architecture is based on a regular array of homogeneous cells. The proposed programmable architecture implements in a distributed way self-adaptive capabilities including self-placement and self-routing which, due to its intrinsic design, enable the development of systems with runtime reconfiguration, self-repair and/or fault tolerance capabilities. The physical implementation of this architecture is composed of two-layers, interconnected cells in the first level and interconnected switch and pin matrices in the second level. The cell is the basic element of the proposed self-adaptive architecture. Any application scheduled to the system has to be organized in components, where each component is composed by one or more interconnected cells. The interconnection of cells inside a component is made at cell level (first layer), while the physical interconnections of components are made in the second layer. Additionally, two layers are defined as conceptual organization for the implementation of general purpose applications: the SANE and the SANE assembly. The Self-Adaptive Networked Entity (SANE) is composed by a group of components. This is the basic self-adaptive computing system. It has the ability to monitor its local environment and its internal computation process. The SANE-Assembly (SANE-ASM) is composed by a group of interconnected SANEs. The processing capabilities of the cell are included in its Functional Unit (FU), which can be described as a four-core configurable multicomputer. The FU includes twelve programmable configuration modes, i.e., each cell permits to select from one to four processors working in parallel, with different size of program and data memories. The self-adaptive capabilities of the cell are executed mainly by the Cell Configuration Unit (CCU). The self-placement algorithm is responsible for finding out the most suitable position in the cell array to insert the new cell of a component. The self-routing algorithm permits interconnecting the ports of the FU of two cells through the cell ports. The self-placement and self-routing processes allow for performing complex functionality changes in real time, these processes endow the system with enhanced functionality, enabling the system to change itself, this allows for the implementation of run-time self-configuration, without the need for any configuration manager. The architecture proposed includes two mechanisms of fault tolerance. One of these is the Dynamic Fault Tolerance Scaling Technique, that has the ability to create and eliminate the redundant copies of the functional section of a specific application. The other mechanism of fault tolerance is a dedicated or static Fault Tolerance System. It provides redundant processing capabilities that are working continuously. When a failure in the execution of a program is detected, the processors of the cell are stopped and the self-elimination and self-replication processes start for the cell (or cells) involved in the failure. An FPGA-based prototype and a software tool have been built for demonstration purposes. The prototype includes all the self-adaptive capabilities described in this dissertation. With the purpose of having a complete development system, the software tool SANE Project Developer (SPD) has been implemented. The SPD is an Integrated Development Environment (IDE) that allows generating the memory initialization data for the control microprocessor inside the prototype.

    Esta tesis doctoral describe una arquitectura de hardware auto-adaptable novedosa y no convencional con capacidad de procesamiento en paralelo. Por razones de escalabilidad, esta arquitectura bioinspirada está basada en una matriz regular de células homogéneas. La arquitectura propuesta es programable, e implementa de manera distribuida diversas capacidades auto-adaptables incluyendo el auto-emplazamiento y auto-enrutamiento, los cuales debido a su diseño intrínseco, permiten el desarrollo de sistemas reconfigurables en tiempo de ejecución, así como de sistemas autoreparables y/o con capacidades de tolerancia a fallos. La implementación física de esta arquitectura esta compuesta de dos capas, que incluyen células interconectadas en el primer nivel y matrices de conmutación y pines en el segundo nivel. La célula es el elemento básico de la arquitectura propuesta. Cualquier aplicación que se quiera programar en el sistema debe estar organizada en componentes, donde cada componente está compuesto por una o más células interconectadas. La interconexión de células dentro de un componente es realizado en el mismo nivel de la matriz de células, mientras que la interconexión de componentes es realizada en la segunda capa. Adicionalmente, se definen dos capas conceptuales que son usadas con propósitos organizativos en aplicaciones de propósito general, estas son: el SANE y el SANE-assembly (o conjunto de SANEs). La entidad auto-adaptable interconectada o SANE está compuesta por un grupo de componentes. Este es el sistema de computación auto-adaptable básico, el cual tiene la habilidad de monitorizar su entorno local y su proceso de computación interno. Las capacidades de procesamiento de la célula están incluidas en su unidad funcional (FU). Esta puede ser definida como un multicomputador configurable con cuatro núcleos, los cuales son agrupados o no dependiendo del modo de configuración. La FU tiene doce modos de configuración programables, por lo que cada célula permite seleccionar entre uno y cuatro procesadores trabajando en paralelo con diversas capacidades en las memorias de programa y datos. Las capacidades auto-adaptables de la célula son ejecutadas principalmente por la unidad de configuración de la célula (CCU). El algoritmo de auto-emplazamiento es el encargado de encontrar la posición mas adecuada dentro de la matriz de células para insertar la nueva célula de un componente. El algoritmo de auto-enrutamiento permite interconectar los puertos de las FU de dos células. Los procesos de auto-emplazamiento y auto-enrutamiento permiten realizar en tiempo real cambios funcionales complejos; estos procesos dotan al sistema de una mayor funcionalidad, permitiendo que el sistema cambie por si mismo, lo que permite la implementación de la auto-configuración en tiempo real, sin la necesidad de ningún gestor de configuración. La arquitectura propuesta incluye dos mecanismos de tolerancia a fallos. Uno de estos es una técnica escalonada y dinámica de tolerancia a fallos, que tiene la habilidad de crear y eliminar copias redundantes de la unidad funcional (o de cómputo) de una aplicación específica. El otro mecanismo de tolerancia a fallos es el Sistema de Tolerancia a Fallos dedicado o estático. Este provee capacidades de procesamiento redundante que están en funcionamiento continuamente. Cuando un fallo en la ejecución de un programa es detectado, los procesadores de la célula son detenidos y los procesos de auto-eliminación y auto-replicación se inician para la célula (o células) implicada en el fallo. Se desarrolló un prototipo basado en FPGAs y una herramienta de software para comprobar la funcionalidad del sistema. El prototipo incluye todas las características de los sistemas auto-adaptable descritas en este trabajo. El SANE Project developer (SPD) es un ambiente integrado de desarrollo (IDE) que permite generar y descargar la memoria de inicialización de datos para el Microprocesador de Control dentro del prototipo.

  • Centre d'Estudis Tecnològics per a l'atenció a la Dependència i vida autònoma

     Cabestany Moncusi, Joan; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cosp Vilella, Jordi; Llanas Parra, Francesc Xavier; Sama Monsonis, Albert; Perez Lopez, Carlos; Rodriguez Martin, Daniel Manuel; Reyes Ortiz, Jorge Luis; Sayeed, Taufique; Takac, Boris; Khan, Rafiullah; Huang-Ming, Chang; Bano, Sophia; Català Mallofré, Andreu
    Competitive project

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  • The imbalance network and incremental evolution for mobile robot nervous system design

     Olivier, Paul; Moreno Arostegui, Juan Manuel
    International Conference on Artificial Neural Networks
    p. 519-526
    DOI: 10.1007/978-3-642-40728-4_65
    Presentation's date: 2013-09
    Presentation of work at congresses

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    Automatic design of neurocontrollers (as in Evoluationary Robotics) utilizes incremental evolution to solve for more complex behaviors. Also manual design techniques such as task decomposition are employed. Manual design itself can benefit from focusing on using incremental evolution to add more automatic design. The imbalance network is a neural network that integrates incremental evolution with an incremental design process without the need for task decomposition. Instead, the imbalance network uses the mechanism of the equilibrium-action cycle to structure the network while emphasizing behavior emergence. An example 11-step design (including a 5-step evolutionary process) is briefly mentioned to help ground the imbalance network concepts.

    Automatic design of neurocontrollers (as in Evoluationary Robotics) utilizes incremental evolution to solve for more complex behaviors. Also manual design techniques such as task decomposition are employed. Manual design itself can benefit from focusing on using incremental evolution to add more automatic design. The imbalance network is a neural network that integrates incremental evolution with an incremental design process without the need for task decomposition. Instead, the imbalance network uses the mechanism of the equilibrium-action cycle to structure the network while emphasizing behavior emergence. An example 11-step design (including a 5-step evolutionary process) is briefly mentioned to help ground the imbalance network concepts.

  • METHODS OF COVERT COMMUNICATION OF SPEECH SIGNALS BASED ON A BIO-INSPIRED PRINCIPLE  Open access

     Ballesteros Larrotta, Dora Maria
    Department of Electronic Engineering, Universitat Politècnica de Catalunya
    Theses

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    Esta tesis presenta dos métodos de comunicación encubierta de señales de voz utilizando un concepto bio-inspirado, conocido como la habilidad de adaptación de señales de voz. Si se tienen dos señales de voz con diferente texto, la primera un mensaje secreto y la segunda una señal de voz con contenido no confidencial (señal objetivo), es posible que el mensaje secreto se manipule para suene como la señal objetivo. La habilidad de adaptación de las señales de voz se utiliza para encriptar señales de voz en el dominio wavelet. A diferencia de los esquemas tradicionales, la señal de voz encriptada es una señal con texto legible y el proceso de permutación se basa en la adaptación entre los coeficientes wavelet del mensaje secreto y los coeficientes wavelet de la señal de voz objetivo. Entonces, el sistema puede ser visto como un caso especial de encriptación tiempo-frecuencia (TFS). Este es un sistema perfectamente secreto porque la longitud de la clave es igual a la longitud del mensaje secreto, hay tantos mensajes secretos como señales encriptadas y el mapeo entre las entradas y las salidas es uno a uno. Se concluye que el sistema supera el ataque de fuerza bruta. Adicionalmente, el mensaje secreto puede ser recuperado por el usuario autorizado aún si la señal de voz encriptada es manipulada utilizando ataques de compresión, filtrado o re-muestreo.En el caso de esteganografía, se proponen dos esquemas. El primero se denomina enmascaramiento wavelet eficiente (EWM) y el segundo EWM mejorado (iEWM). Los dos aprovechan la propiedad de enmascaramiento del sistema auditivo humano (HAS) utilizando un proceso eficiente de enmascaramiento basado en la adaptación del mensaje secreto a la señal de voz huésped. EWM utiliza una sustitución directa basada en el parámetro Pd el cual relaciona la amplitud de los coeficientes wavelet de la señal huésped con los coeficientes wavelet del mensaje secreto adaptado. Los 5 bits menos significativos (LSBs) de los coeficientes wavelet de la señal huésped se reemplazan con el valor de Pd. A diferencia de EWM, iEWM utiliza sustitución directa. En este caso, los coeficientes wavelet del mensaje secreto adaptado se ocultan directamente en los coeficientes wavelet de la señal huésped. El número de bits varía de acuerdo a la amplitud de los coeficientes wavelet de la señal huésped, a mayor amplitud mayor es el número de LSBs que son modificados. No obstante, los bits más significativos (MSBs) se mantienen intactos de acuerdo al parámetro de control SBH. Mientras EWM demostró ser más transparente (es decir que la señal estego no genera sospechas sobre la existencia del mensaje secreto), iEWM es más robusto frente a manipulaciones de señal como compresión y re-muestreo.Dado que los dos modelos propuestos necesitan conocer de antemano tanto el mensaje secreto como la señal objetivo (o la señal huésped), no se pueden utilizar en aplicaciones de tiempo real. De tal forma, se presenta un esquema de esteganografía que trabaja sobre dispositivos hardware en el cual la señal estego se obtiene casi inmediatamente como se pronuncia el mensaje secreto.

    This work presents two speech hiding methods based on a bio-inspired concept known as the ability of adaptation of speech signals. A cryptographic model uses the adaptation to transform a secret message to a non-sensitive target speech signal, and then, the scrambled speech signal is an intelligible signal. The residual intelligibility is extremely low and it is appropriate to transmit secure speech signals. On the other hand, in a steganographic model, the adapted speech signal is hidden into a host signal by using indirect substitution or direct substitution. In the first case, the scheme is known as Efficient Wavelet Masking (EWM), and in the second case, it is known as improved-EWM (iEWM). While EWM demonstrated to be highly statistical transparent, the second one, iEWM, demonstrated to be highly robust against signal manipulations. Finally, with the purpose to transmit secure speech signals in real-time operation, a hardware-based scheme is proposed

    Esta tesis presenta dos métodos de comunicación encubierta de señales de voz utilizando un concepto bio-inspirado, conocido como la “habilidad de adaptación de señales de voz”. El modelo de criptografía utiliza la adaptación para transformar un mensaje secreto a una señal de voz no confidencial, obteniendo una señal de voz encriptada legible. Este método es apropiado para transmitir señales de voz seguras porque en la señal encriptada no quedan rastros del mensaje secreto original. En el caso de esteganografía, la señal de voz adaptada se oculta en una señal de voz huésped, utilizando sustitución directa o indirecta. En el primer caso el esquema se denomina EWM y en el segundo caso iEWM. EWM demostró ser altamente transparente, mientras que iEWM demostró ser altamente robusto contra manipulaciones de señal. Finalmente, con el propósito de transmitir señales de voz seguras en tiempo real, se propone un esquema para dispositivos hardware.

  • REMPARK: when AI and technology meet parkinson disease assessment

     Cabestany Moncusi, Joan; Perez Lopez, Carlos; Sama Monsonis, Albert; Moreno Arostegui, Juan Manuel; Bayes, Ángels; Rodríguez Molinero, Alejandro
    International Conference Mixed Design of Integrated Circuits and Systems
    p. 562-567
    Presentation's date: 2013-06
    Presentation of work at congresses

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    REMPARK project objective is to develop a personal health system with closed loop detection, response and action capabilities for the assessment and possible management of Parkinson's Disease (PD) patients. The project is developing a wearable monitoring system able to identify in real time the motor status of the PD patients and evaluating ON/OFF/Dyskinesia status with a very high sensitivity and specificity degree (>80%) in operation during ambulatory conditions. Identification of the motor status is based on the knowledge included in a large database obtained with the collaboration of a number of volunteer PD patients, according a specific defined protocol in ambulatory conditions. Artificial Intelligence (AI) methods are applied to the database information for the automatic detection of motor symptoms.

  • FATE: one step towards an automatic aging people fall detection service

     Cabestany Moncusi, Joan; Moreno Arostegui, Juan Manuel; Perez Lopez, Carlos; Sama Monsonis, Albert; Català Mallofré, Andreu; Rodríguez Molinero, Alejandro; Arnal, Marc
    International Conference Mixed Design of Integrated Circuits and Systems
    p. 545-552
    Presentation's date: 2013-06
    Presentation of work at congresses

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    FATE is a project funded by the European Union under the program CIP/ICT-PSP with the main objective of organizing a big pilot on the automatic falls detection in aging people living at home. Automatic detection of falls is done in indoors and outdoors conditions, and in both cases the detection generates an alarm sent to a call center. The detection system is designed around a sensor sub-system based on accelerometers and gyroscopes able to detect falls with a high reliability. The complete system is based on a communications layer based in ZigBee and Bluetooth protocols. The gateway for sending the alarm to the call center is a mobile phone. Pilots are organized in three different countries (Spain, Italy and Ireland) where different models of health service and implemented call centers are available. Pilots duration will be one year, involving 175 users and one of the main final objectives is to gain experience with the integration of an automatic fall detection service in an already care/health existing service.

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    A heterogeneous database for movement knowledge extraction in Parkinson's disease  Open access

     Sama Monsonis, Albert; Perez Lopez, Carlos; Rodriguez Martin, Daniel Manuel; Cabestany Moncusi, Joan; Moreno Arostegui, Juan Manuel; Rodríguez Molinero, Alejandro
    European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning
    p. 413-418
    Presentation's date: 2013-04-26
    Presentation of work at congresses

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    This paper presents the design and methodology used to create a heterogeneous database for knowledge movement extraction in Parkinson's Disease. This database is being constructed as part of REM- PARK project and is composed of movement measurements acquired from inertial sensors, standard medical scales as Unied Parkinson's Disease Rating Scale, and other information obtained from 90 Parkinson's Disease patients. The signals obtained will be used to create movement disorder detection algorithms using supervised learning techniques. The different sources of information and the need of labelled data pose many challenges which the methodology described in this paper addresses. Some preliminary data obtained are presented.

    This paper presents the design and methodology used to create a heterogeneous database for knowledge movement extraction in Parkinson's Disease. This database is being constructed as part of REM- PARK project and is composed of movement measurements acquired from inertial sensors, standard medical scales as Uni ed Parkinson's Disease Rating Scale, and other information obtained from 90 Parkinson's Disease patients. The signals obtained will be used to create movement disorder detection algorithms using supervised learning techniques. The different sources of information and the need of labelled data pose many challenges which the methodology described in this paper addresses. Some preliminary data obtained are presented.

  • A communication infrastructure for emulating large-scale neural networks models

     Barrera, A.G.; Moreno Arostegui, Juan Manuel
    International Conference on Artificial Neural Networks
    p. 129-136
    DOI: 10.1007/978-3-642-33269-2_17
    Presentation's date: 2012-09-11
    Presentation of work at congresses

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    This paper presents the SEPELYNS architecture that permits to in- terconnect multiple spiking neurons focused on hardware implementations. SEPELYNS can connect millions of neur ons with thousands of synapses per neuron in a layered fabric that provides some capabilities such as connectivity, expansion, flexibility, bio-plausibility and reusing of resources that allows si- mulation of very large networks. We presen t the three layers of this architecture (neuronal, network adapters and networks on chip layers) and explain its per- formance parameters such as throughput, latency and hardware resources. Some application examples of large neural networks on SEPELYNS are studied; these will show that use of on-chip parallel networks could permit the hardware simulation of populations of spiking neurons.

  • The Equilibrium-action cycle as a mechanism for design-evolution integration in autonomous behavior design

     Olivier, Paul; Moreno Arostegui, Juan Manuel
    NASA/ESA Conference on Adaptive Hardware and Systems
    p. 190-197
    DOI: 10.1109/AHS.2012.6268649
    Presentation's date: 2012-06-25
    Presentation of work at congresses

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  • Fall Detector for the Elder

     Català Mallofré, Andreu; Moreno Arostegui, Juan Manuel; Sama Monsonis, Albert; Perez Lopez, Carlos; Cortes Garcia, Claudio Ulises; Martinez Velasco, Antonio Benito; Romagosa Cabús, Jaume; Rodriguez Martin, Daniel Manuel; Cabestany Moncusi, Joan
    Competitive project

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  • Sistema en chip micro-electro-mecánico (MEMSOC)

     Cosp Vilella, Jordi; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi
    Competitive project

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  • POETIC-CUBES

     Paricio, Raquel; Moreno Arostegui, Juan Manuel
    Date of publication: 2012
    Book chapter

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  • Personal Health Device for the Remote and Autonomous Management of

     Català Mallofré, Andreu; Moreno Arostegui, Juan Manuel; Perez Lopez, Carlos; Sama Monsonis, Albert; Sayeed, Taufique; Rodriguez Martin, Daniel Manuel; Cabestany Moncusi, Joan
    Competitive project

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  • Equilibrium-Driven Adaptive Behavior Design

     Olivier, Paul; Moreno Arostegui, Juan Manuel
    International Work-Conference on Artificial Neural Networks
    p. 589-596
    DOI: 10.1007/978-3-642-21498-1_74
    Presentation's date: 2011-06-08
    Presentation of work at congresses

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    In autonomous robotics, scalability is a primary discriminator for evaluating a behavior design methodology. Such a proposed methodology must also allow efficient and effective conversion from desired to implemented behavior. From the concepts of equilibrium and homeostasis, it follows that behavior could be seen as driven rather than controlled. Homeostatic variables allow the development of need elements to completely implement drive and processing elements in a synthetic nervous system. Furthermore, an autonomous robot or system must act with a sense of meaning as opposed to being a human-command executor. Learning is fundamental in adding adaptability, and its efficient implementation will directly improve scalability. It is shown how using classical conditioning to learn obstacle avoidance can be implemented with need elements instead of an existing artificial neural network (ANN) solution.

  • Description of a fault tolerance system implemented in a hardware architecture with self-adaptive capabilities

     Soto, Javier; Moreno Arostegui, Juan Manuel; Cabestany Moncusi, Joan
    International Work-Conference on Artificial Neural Networks
    p. 557-564
    DOI: 10.1007/978-3-642-21498-1_70
    Presentation's date: 2011-06-09
    Presentation of work at congresses

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    This paper describes a Fault Tolerance System (FTS) implemented in a new self-adaptive hardware architecture. This architecture is based on an array of cells that implements in a distributed way self-adaptive capabilities. The cell includes a configurable multiprocessor, so it can have between one and four processors working in parallel, with a programmable configuration mode that allows selecting the size of program and data memories. The self-elimination and self-replication capabilities of cell(s) are performed when the FTS detects a failure in any of the processors that include it, so that this cell(s) will be self-discarded for future implementations. Other self-adaptive capabilities of the system are self-routing, self-placement and runtime self-configuration.

  • Coming back to the body. The sensible experience and the bio-inspired technology

     Paricio, Raquel; Moreno Arostegui, Juan Manuel
    McLuhan Galaxy Conference
    p. 538-551
    Presentation's date: 2011-05-23
    Presentation of work at congresses

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  • Bioinspired sensory integration for environment-perception embedded systems

     Madrenas Boadas, Jordi; Fernandez Martinez, Daniel; Cosp Vilella, Jordi; Moreno Arostegui, Juan Manuel; Martínez Alvarado, Luis Arturo; Sanchez Rivera, Giovanny
    International Conference on Biomedical Electronics and Devices
    p. 260-267
    Presentation of work at congresses

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    JubiTool: Unified design flow for the perplexus SIMD hardware accelerator  Open access

     Brousse, O.; Guillot, J.; Gil, T.; Grize, F.; Sassatelli, G.; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Villa, A.; Volken, H.; Robert, M.
    IEEE Congress on Evolutionary Computation
    p. 2070-2075
    Presentation's date: 2010-02-19
    Presentation of work at congresses

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    This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous computing. This contribution relies on the JubiTool: a set of integrated tools (JubiSplitter, JubiCompiler, UbiAssembler), allowing respectively to extract, compile and assemble parallelizable parts of applications described in Jubi language. Jubi is a modified Java agent based language (JADE) dedicated to the Ubichip (the bio-inspired chip developed within the confines of the Perplexus project). By appending hardware directives to a software agent description, the inherent flexibility of software is combined with the runtime performance of a hardware execution. In the case of typical Perplexus applications such as the Spiking Neural Network Simulator, this contribution takes profit of the intrinsic property of the Ubichip in terms of parallelism resulting in an expected speedup of at least one order of magnitude. Finally, this hybrid (SW/HW) flow could be easily modified and adapted to support other kind of distributed platforms

  • From the object to the system: art-perception and evolution

     Paricio, Raquel; Moreno Arostegui, Juan Manuel
    ATACD ¿ A Topological Approach to Cultural Dynamics. Changing Cultures: Cultures of Change
    p. 64
    Presentation's date: 2009-12
    Presentation of work at congresses

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  • Poetic cubes: attention, adaptation, emergent systems, bio-inspiration and artificial life

     Paricio, Raquel; Moreno Arostegui, Juan Manuel
    Date of publication: 2009-12-10
    Book chapter

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  • A bio-inspired agent framework for hardware accelerated distributed pervasive applications

     Brousse, O.; Guillot, J.; Sassatelli, G.; Gil, Thierry; Robert, Michel; Moreno Arostegui, Juan Manuel; Villa, Alessandro; Sanchez, Eduardo
    NASA/ESA Conference on Adaptive Hardware and Systems
    p. 415-422
    Presentation's date: 2009-08
    Presentation of work at congresses

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  • Strategies in SIMD computing for complex neural bioinspired applications

     Madrenas Boadas, Jordi; Moreno Arostegui, Juan Manuel
    NASA/ESA Conference on Adaptive Hardware and Systems
    p. 376-381
    Presentation's date: 2009-08-01
    Presentation of work at congresses

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  • A Reconfigurable Architecture for Emulating Large-Scale Bio-inspired Systems

     Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi
    IEEE Congress on Evolutionary Computation
    Presentation's date: 2009-05-18
    Presentation of work at congresses

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  • Concurso Internacional Arte y Vida Artificial. Fundación Telefónica.

     Paricio, Raquel; Moreno Arostegui, Juan Manuel
    Award or recognition

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  • Synchronous digital implementation of the AER communication scheme for emulating large-scale spiking neural networks models

     Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Kotynia, L.
    NASA/ESA Conference on Adaptive Hardware and Systems
    p. 189-196
    Presentation of work at congresses

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  • SpiNDeK: An integrated design tool for the multiprocessor emulation of complex bioinspired spiking neural networks

     Hauptvogel, Michael; Madrenas Boadas, Jordi; Moreno Arostegui, Juan Manuel
    IEEE Congress on Evolutionary Computation
    p. 142-148
    Presentation of work at congresses

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    SpiNDeK (Spiking Neural Network Design Kit) is an integrated design tool intended to support the development of emulation of complex bioinspired neural networks. In this work, the most relevant aspects of the tool are reported, regarding the generation of connections as well as synapse and neuron parameters of spiking neural networks as well as the automated code generation and simulation, ready to be executed by an ad-hoc parallel architecture. The tool is fully functional and has demonstrated its usefulness.

  • Implementation of a dynamic fault-tolerance scaling technique on a self-adaptive hardware architecture

     Soto Vargas, J.; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    International Conference on ReConFigurable Computing and FPGAs
    p. 445-450
    Presentation of work at congresses

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  • Implementation of a dynamic fault-tolerance scaling technique on a self-adaptative hardware architecture

     Soto Vargas, J.; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    2009 International Conference on ReConFigurable Computing and FPGAs
    p. 445-450
    Presentation of work at congresses

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  • Diseño de un Multiprocesador Configurable y de la Interfaz de Comunicaciones para una Arquitectura de Hardware Auto-Adaptable

     Vargas, Soto J; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    JCRA 08 - VIII Jornadas de Computación Reconfigurable y Aplicaciones
    p. 295-305
    Presentation of work at congresses

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  • Communication Infrastructure for a Self-Adaptive Hardware Architecture

     Soto, J; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    Reconfigurable Communication-centric Systems-on-Chip workshop 2008 - ReCoSoC'08
    p. 175-180
    Presentation of work at congresses

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  • On-Line Communication Mechanisms for Self-adaptative and Self-reconfigurable Systems

     Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan; Katarina, Paulsson; Michael, Huebner I Juergen Becker
    Reconfigurable Communication-centric Systems-on-Chip workshop 2008 - ReCoSoC'08
    p. 93-100
    Presentation of work at congresses

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  • Design of a Configurable Multiprocessor for a Self-Adaptive Hardware Architecture

     Vargas, Soto J; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    Conference on Design of Circuits and Integrated Systems
    p. 1-6
    Presentation of work at congresses

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  • Arquitectura Hardware para Sistemas Autoadaptativos

     Antonio, José Casas; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    II Congreso Español de Informática. VII Jornadas de Computación Reconfigurable y Aplicaciones (JCRA'07)
    p. 171-178
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  • A Novel Hardware Architecture for Self-adaptative Systems

     Antonio, José Casas; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    2007 NASA/ESA Conference Adaptive Hardware and Systems
    p. 592-599
    Presentation of work at congresses

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  • PERPLEXUS: Pervasive Computing Framework for Modeling Complex Virtually-Unbounded Systems

     Eduardo, Sanchez; Perez-Uribe, Andres; Andres, Upegui; Yann, Thom; Moreno Arostegui, Juan Manuel; Alessandro, Villa; Wolken, Henri; Napieralski, Andrzej; Sassatelli, Gilles I Erwan Lavarec
    2007 NASA/ESA Conference Adaptive Hardware and Systems
    p. 587-591
    Presentation of work at congresses

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  • The Perplexus bio-inspired reconfigurable circuit

     Andres, Upegui; Thoma, Yann; Eduardo, Sanchez; Perez-Uribe, Andres; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi
    2007 NASA/ESA Conference Adaptive Hardware and Systems
    p. 600-605
    Presentation of work at congresses

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  • POEtic-Cubes: sistemas de adaptación al entorno para el desarrollo de las percepciones

     Moreno Arostegui, Juan Manuel
    ARTECH 2006 - Third International Conference on Digital and Electronic Art (TERCEIRA CONFERENCIA INTERNACIONAL DE ARTE ELECTRÓNICO E DIXITAL)
    Presentation's date: 2006-11-17
    Presentation of work at congresses

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  • REMMS: Sistema reconfigurable mixto para acondicionamiento de MEMS

     Madrenas Boadas, Jordi; Cosp Vilella, Jordi; Fernandez Martinez, Daniel; Herminio, Martínez; Moreno Arostegui, Juan Manuel; Antoni, Mas i Eva Vidal
    Date: 2006-11
    Report

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  • PROGRAMMABLE ARCHITECTURE FOR SELF-ADAPTIVE HARDWARE

     Moreno Arostegui, Juan Manuel
    ECSIS Symposium on Intelligent Systems for Defense and Security (ISDS)
    Presentation's date: 2006-09-20
    Presentation of work at congresses

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  • PERVASIVE COMPUTING FRAMEWORK FOR MODELLING COMPLEX VIRTUALLY-UNBOUNDED SYSTEMS (PERPLEXUS)

     Cosp Vilella, Jordi; Moreno Arostegui, Juan Manuel; Madrenas Boadas, Jordi
    Competitive project

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  • TOWARDS A FRONT-END FLOW AND DESIGN METHODOLOGY FOR DYNAMICALLY RECONFIGURABLE SYSTEMS

     Moreno Arostegui, Juan Manuel
    ReCoSoC'06 - Workshop Reconfigurable Communication-centric SoCs
    Presentation's date: 2006-07-03
    Presentation of work at congresses

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  • EFFICIENT METHODS OF RESOURCE MANAGEMENT IN RE-PROGRAMMABLE SYSTEMS

     KIELBIK, RAFAL
    Department of Electronic Engineering, Universitat Politècnica de Catalunya
    Theses

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  • Programmable architecture for self-adaptive hardware

     Moreno Arostegui, Juan Manuel; Casas, J A; Madrenas Boadas, Jordi; Cabestany Moncusi, Joan
    ECSIS Symposium on Intelligent Systems for Defense and Security (ISDS)
    p. 1-4
    Presentation of work at congresses

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  • Poetic: a hardware prototyping platform with bioinspired capabilities

     Moreno Arostegui, Juan Manuel; Sanchez, Y Thoma i E
    MIXDES 2006 - International Conference Mixed Design of Integrated Circuits and Systems
    p. 363-368
    Presentation of work at congresses

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  • Towards a front-end flow and design methodology for dynamically reconfigurable systems

     Moreno Arostegui, Juan Manuel
    ReCoSoC'06 - Workshop Reconfigurable Communication-centric SoCs
    p. 1-5
    Presentation of work at congresses

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  • TEC2005-25779-E AETHER - TECNOLOGÍAS EMPOTRADAS AUTO-ADAPTATIVAS PARA ARQUITECTURAS DE COMPUTACIÓN PERVASIVA

     Moreno Arostegui, Juan Manuel; Cabestany Moncusi, Joan; Madrenas Boadas, Jordi
    Competitive project

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  • SELF-ADAPTATIVE EMBEDDED TECHNOLOGIES FOR PERVASIVE COMPUTING ARCHITECTURES (AETHER)

     Madrenas Boadas, Jordi; Cabestany Moncusi, Joan; Moreno Arostegui, Juan Manuel
    Competitive project

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  • Outstanding Paper Award International Conference MIXDES 2006

     Moreno Arostegui, Juan Manuel; Sanchez, Y Thoma i E
    Award or recognition

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