Martínez García, Herminio
Total activity: 288
Professional category
Tenure-track 2 lecturers
Doctoral courses
Doctor per la UPC
Research group
EPIC - Energy Processing and Integrated Circuits
PERC-UPC - Power Electronics Research Centre
Department
Department of Electronic Engineering
School
Escola Universitària d'Enginyeria Tècnica Industrial de Barcelona (EUETIB)
E-mail
herminio.martinezupc.edu
Contact details
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Orcid
0000-0002-7977-2577 Open in new window

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Scientific and technological production
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1 to 50 of 288 results
  • Some limits in peer assessment

     Domingo Peña, Joan; Martínez García, Herminio; Gomariz Castro, Spartacus; Gamiz Caro, Juan
    Journal of technology and science education
    Date of publication: 2014-03-25
    Journal article

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    Nowadays, the educational methodology known as `peer assessment¿ constitutes one of the pillars of formative assessment at the different levels of the educational system, particularly at the University level. In fact, in recent years, it has been increasingly used to enhance students' meaningful learning, as it is considered to be an element of social learning, in which students benefit from the lessons learned by other classmates, and draw upon the ability to assess the quality of the learning, contrasting it with the level of knowledge that each has about the subject/course being evaluated, and using common evaluation criteria. In this regard, this paper represents the experience of two groups of students. It allows us to determine how many peer assessments should be required of students in a particular course in order to constitute a serious, reliable activity. On the other hand, from the point of view of the student, the assessments are evaluated to the extent that they are seen as a required and mandatory exercise that must be carried out by students simply to pass the course. In the latter case, the activity can become extremely trivial and banal. Statistical analysis of the results indicates that three peer assessments per student appraised represents an adequate number. On the other hand, more than thirty peer assessments fail to contribute to learning, nor do they represent serious activities.

  • Observation of chaotic behavior in automatic tuning loops for continuous-time filters

     Martínez García, Herminio; Cosp Vilella, Jordi; Manzanares Brotons, Manuel
    IEEE International Midwest Symposium on Circuits and Systems
    Presentation's date: 2014-08
    Presentation of work at congresses

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    he appropriate linear dynamic modeling of continuous-time filters (CTFs) with automatic tuning loops should be obtained to assure stability in case an improved design of the loop controllers is to be carried out. With this aim, starting from a general and systematic analysis in order to obtain an equivalent small-signal linearized incremental model, from which transfer functions between output variables and control voltages are derived, the subsequent design of compensated loops with enhanced stability and dynamic performance is required. This systematic procedure allows obtaining improved controllers for the two involved control loops. However, CTFs with automatic tuning loops are nonlinear feedback systems with potential instability. What is more, nonlinear phenomena, which cannot be predicted by a design-oriented small signal modeling approach, are observed in this kind of tuning systems. The purpose of this work is to highlight that when control parameters are varied, the system could present different kinds of dynamical nonlinear phenomena such as bifurcations and chaotic behavior, which cannot be predicted by the small signal design-oriented model.

    he appropriate linear dynamic modeling of continuous-time filters (CTFs) with automatic tuning loops should be obtained to assure stability in case an improved design of the loop controllers is to be carried out. With this aim, starting from a general and systematic analysis in order to obtain an equivalent small-signal linearized incremental model, from which transfer functions between output variables and control voltages are derived, the subsequent design of compensated loops with enhanced stability and dynamic performance is required. This systematic procedure allows obtaining improved controllers for the two involved control loops. However, CTFs with automatic tuning loops are nonlinear feedback systems with potential instability. What is more, nonlinear phenomena, which cannot be predicted by a design-oriented small signal modeling approach, are observed in this kind of tuning systems. The purpose of this work is to highlight that when control parameters are varied, the system could present different kinds of dynamical nonlinear phenomena such as bifurcations and chaotic behavior, which cannot be predicted by the small signal design-oriented model.

  • High slew rate current mode transconductance error amplifier for low quiescent current output-capacitorless CMOS LDO regulator

     Fathipour, Rasoul; Saberkari, Alireza; Martínez García, Herminio; Alarcon Cot, Eduardo Jose
    Integration. The VLSI journal
    Date of publication: 2013-11-08
    Journal article

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    This paper presents a CMOS low quiescent current output-capacitorless low-dropout regulator (LDO) based on a high slew rate current mode transconductance amplifier (CTA) as error amplifier. Using local common-mode feedback (LCMFB) in the proposed CTA, the order of transfer characteristic of the circuit is increased. Therefore, the slew rate at the gate of pass transistor is enhanced. This improves the LDO load transient characteristic even at low quiescent current. The proposed LDO topology has been designed and post simulated in HSPICE in a 0.18 µm CMOS process to supply the load current between 0-100 mA. The dropout voltage of the LDO is set to 200 mV for 1.2-2 V input voltage. Post-layout simulation results reveal that the proposed LDO is stable without any internal compensation strategy and with on-chip output capacitor or lumped parasitic capacitances at the output node between 10-100 pF. The total quiescent current of the LDO including the current consumed by the reference buffer circuit is only 3.7 µA. A final benchmark comparison considering all relevant performance metrics is presented.

  • On Modified Wien¿Bridge Oscillator and Astable Oscillator

     Martínez García, Herminio
    Analog integrated circuits and signal processing
    Date of publication: 2013-02
    Journal article

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    The present article is related to the recently published paper given in (Abuelma¿atti and Khalifa, Analog Integr Circuits Signal Process, 73:989¿992, 2012), which depicts the possible relation between the modified Wien-bridge circuit used by the authors of references (Singh, Analog Integr Circuits Signal Process 48:251¿255, 2006; Singh, Analog Integr Circuits Signal Process, 50:127¿132, 2007; Singh, Analog Integr Circuits Signal Process, 62:327¿332, 2010; Wangenheim, Analog Integr Circuits Signal Process, 66:139¿141, 2011; Martinez-Garcia et al., Analog Integr Circuits Signal Process, 70:443¿449, 2012), and the comparator-based relaxation oscillator. In particular, in the referenced Mixed Signal Letter (Abuelma¿atti and Khalifa, Analog Integr Circuits Signal Process, 73:989¿992, 2012), the authors assert that the modified Wien-bridge oscillator circuit under discussion, used previously in the aforementioned referenced articles, can behave as a sinusoidal oscillator only at relatively high frequencies when the operational amplifier can be considered non-ideal. In addition, at relatively low frequencies, when the operational amplifier can be considered ideal, the same circuit would behave as a relaxation oscillator with a square wave output rather than a sinusoidal output. However, this paper reveals that this assertion is not strictly correct, because in both cases (in low and high frequencies), the generated waveform at the circuit output is a sinusoidal signal, with the possibility of be cut out, depending on proper circuit dimensioning (according to the oscillation criterion) as well as the oscillation frequency and the properties of the amplifier (slew rate, and frequency response).

  • MACHREK ENERGY DEVELOPMENT

     Martínez García, Herminio; Pique Lopez, Robert; Velasco Quesada, Guillermo; Guinjoan Gispert, Francisco
    Participation in a competitive project

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  • Premi al Millor Projecte de Final de Carrera CETIB 2013

     Martínez García, Herminio
    Award or recognition

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  • Power gyrator structures and their use as cells for energy processing in photovoltaic solar facilities

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda; Gamiz Caro, Juan
    Spanish-Portuguese Conference on Electrical Engineering
    Presentation's date: 2013-07-04
    Presentation of work at congresses

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    This paper provides a classification of high efficiency switching power-gyrator structures and their use as cells for energy processing in photovoltaic solar facilities. Having into account the properties of these topologies presented in the article, their inclusion in solar facilities allows increasing the performance of the whole installation. Thus, the design, simulation and implementation of a G-type power gyrator are carried out throughout the text. In addition, in order to obtain the maximum power from the photovoltaic solar panel, a maximum power point tracking (MPPT) is mandatory in the energy processing path. Therefore, the practical implementation carried out includes a control loop of the power gyrator in order to track the aforementioned maximum power point of the photovoltaic solar panel.

  • Observation of chaotic behavior in automatic tuning loops for continuous¿time filters

     Martínez García, Herminio; Cosp Vilella, Jordi; Manzanares Brotons, Manuel
    IEEE International Midwest Symposium on Circuits and Systems
    Presentation's date: 2013-08-06
    Presentation of work at congresses

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    The appropriate linear dynamic modeling of continuous¿time filters (CTFs) with automatic tuning loops should be obtained to assure stability in case an improved design of the loop controllers is to be carried out. With this aim, starting from a general and systematic analysis in order to obtain an equivalent small¿signal linearized incremental model, from which transfer functions between output variables and control voltages are derived, the subsequent design of compensated loops with enhanced stability and dynamic performance is required. This systematic procedure allows obtaining improved controllers for the two involved control loops. However, CTFs with automatic tuning loops are nonlinear feedback systems with potential instability. What is more, nonlinear phenomena, which cannot be predicted by a design-oriented small signal modeling approach, are observed in this kind of tuning systems. The purpose of this work is to highlight that when control parameters are varied, the system could present different kinds of dynamical nonlinear phenomena such as bifurcations and chaotic behavior, which cannot be predicted by the small signal design-oriented model.

  • The use of power gyrator structures for energy processing in photovoltaic solar facilities

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda
    IEEE International Conference on Industrial Informatics
    Presentation's date: 2013-07-30
    Presentation of work at congresses

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    This paper provides a classification of high efficiency switching power-gyrator structures and their use as cells for energy processing in photovoltaic solar facilities. Having into account the properties of these topologies presented in the article, their inclusion in solar facilities allows increasing the performance of the whole installation. Thus, the design, simulation and implementation of a G-type power gyrator are carried out throughout the text. In addition, in order to obtain the maximum power from the photovoltaic solar panel, a maximum power point tracking (MPPT) is mandatory in the energy processing path. Therefore, the practical implementation carried out includes a control loop of the power gyrator in order to track the aforementioned maximum power point of the photovoltaic solar panel.

    This paper provides a classification of high efficiency switching power-gyrator structures and their use as cells for energy processing in photovoltaic solar facilities. Having into account the properties of these topologies presented in the article, their inclusion in solar facilities allows increasing the performance of the whole installation. Thus, the design,simulation and implementation of a G-type power gyrator are carried out throughout the text. In addition, in order to obtain the maximum power from the photovoltaic solar panel, a maximum power point tracking (MPPT) is mandatory in the energy processing path. Therefore, the practical implementation carried out includes a control loop of the power gyrator in order to track the aforementioned maximum power point of the photovoltaic solar panel.

  • Design of a 4.5-V, 450-mA low-dropout voltage linear regulator based on a cascoded OTA

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda
    Annual Conference of the IEEE Industrial Electronics Society
    Presentation's date: 2013-11-13
    Presentation of work at congresses

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    This article aims to present the design of a 4.5-V 450-mA low drop-out (LDO) voltage linear regulator based on a two-stage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (T¿) of 0.025 mV/ºC. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 µm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.

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    Design of an on-chip linear-assisted DC-DC voltage regulator  Open access

     Cosp Vilella, Jordi; Martínez García, Herminio
    IEEE International Conference on Electronics, Circuits and Systems
    Presentation's date: 2013-12-10
    Presentation of work at congresses

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    This article shows the design of an on-chip CMOS linear-assisted DC-DC regulator. It results a good alternative topology to classic switching DC-DC power converters. In the presented technique, an auxiliary linear regulator is used to cancel the output voltage ripple and provides fast responses for load and line variations. On the other hand, a switching converter, connected in parallel, allows supplying almost the whole output current demanded by the load. The objective of this linear-assisted regulator or hybrid topology is to achieve a high efficiency of switching converters, with suitable load and line regulation features, typical of linear regulators. In this kind of on-chip applications, CMOS is the current prevailing technology. Thus, in order to implement on-chip power supply systems and on-chip power management systems with low-to-medium current consumption, this structure has good features.

    This article shows the design of an on-chip CMOS linear-assisted DC-DC regulator. It results a good alternative topology to classic switching DC-DC power converters. In the presented technique, an auxiliary linear regulator is used to cancel the output voltage ripple and provides fast responses for load and line variations. On the other hand, a switching converter, connected in parallel, allows supplying almost the whole output current demanded by the load. The objective of this linear-assisted regulator or hybrid topology is to achieve a high efficiency of switching converters, with suitable load and line regulation features, typical of linear regulators. In this kind of on-chip applications, CMOS is the current prevailing technology. Thus, in order to implement on-chip power supply systems and on-chip power management systems with low-to-medium current consumption, this structure has good features.

    Postprint (author’s final draft)

  • On chaotic behavior in automatic tuning loops for continuous-time filters

     Cosp Vilella, Jordi; Martínez García, Herminio
    European Conference on Circuit Theory and Design
    Presentation's date: 2013-09-10
    Presentation of work at congresses

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    Continuous-time filters (CTFs) with automatic tuning loops are nonlinear feedback systems with potential instability. Thus, their appropriate linear dynamic modeling should be obtained to assure stability in case of an improved design of the loop controllers is to be carried out. A systematic approach using a small signal model would allow obtaining these controllers. However, bifurcations and nonlinear phenomena may appear which cannot be predicted by this analysis. This leads to potential instability, semiperiodic or chaotic behavior and, thus, circuit malfunction. The aim of this paper is to show by means of simulations and experimental results that nonlinear phenomena, which cannot be predicted by the common small signal analysis, may appear in this kind of circuits when circuit parameters are varied.

    Continuous–time filters (CTFs) with automatic tuning loops are nonlinear feedback systems with potential instability. Thus, their appropriate linear dynamic modeling should be obtained to assure stability in case of an improved design of the loop controllers is to be carried out. A systematic approach using a small signal model would allow obtaining these controllers. However, bifurcations and nonlinear phenomena may appear which cannot be predicted by this analysis. This leads to potential instability, semiperiodic or chaotic behavior and, thus, circuit malfunction. The aim of this paper is to show by means of simulations and experimental results that nonlinear phenomena, which cannot be predicted by the common small signal analysis, may appear in this kind of circuits when circuit parameters are varied.

  • Diseño de una plataforma docente para el estudio de los sistemas de recolección de energía (energy harvesting) en los grados de ingeniería

     Martínez García, Herminio
    Spanish-Portuguese Conference on Electrical Engineering
    Presentation's date: 2013-07-04
    Presentation of work at congresses

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    El presente artículo presenta el diseño e implementación física de una plataforma docente recolectora y acondicionadora de energía práctica para aplicaciones de energy harvesting. Concretamente, muestra la realización de un sistema de acondicionamiento de energía solar fotovoltaica a partir de un modelo concreto de panel solar. Con el fin de conseguir una plataforma lo más eficiente posible, se ha implementado un sistema de seguimiento del punto de máxima potencia (MPPT) del panel fotovoltaico que optimiza el rendimiento del mismo, adentrando, a su vez, al estudiante de Ingeniería en este tipo de algoritmos. Además, la plataforma recolectora posee regulación de salida, ofreciendo así una tensión de salida constante, independientemente tanto de variaciones de carga como de la tensión de entrada.

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    On-chip SIDO buck converter with independent outputs  Open access

     Martínez García, Herminio; Eachempatti, Haritha; Silva-Martínez, José
    Conference on Design of Circuits and Integrated Systems
    Presentation's date: 2013-11-27
    Presentation of work at congresses

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    The portable electronics market is rapidly migrating towards more compact devices requiring multiple high-integrity high-efficiency voltage supplies for empowering the systems. This paper demonstrates a single inductor used in a buck converter with two output voltages from an input battery with voltage of value 3 V. The main targets are low cross regulation between the two outputs to supply independent load current levels while maintaining desired output voltage values well within the acceptable ripple levels. The proposed controller provides adaptive levels in order to limit the output ripple, achieving a high output voltage accuracy. A reverse current detector to avoid negative current flowing through the inductor, prevents possible efficiency degradation.

    The portable electronics market is rapidly migrating towards more compact devices requiring multiple high-integrity high-efficiency voltage supplies for empowering the systems. This paper demonstrates a single inductor used in a buck converter with two output voltages from an input battery with voltage of value 3 V. The main targets are low cross regulation between the two outputs to supply independent load current levels while maintaining desired output voltage values well within the acceptable ripple levels. The proposed controller provides adaptive levels in order to limit the output ripple, achieving a high output voltage accuracy. A reverse current detector to avoid negative current flowing through the inductor, prevents possible efficiency degradation.

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    `Bang-Bang¿ technique in supply modulation for linear wideband RF power amplifiers  Open access

     Martínez García, Herminio; Turkson, Richard; Silva-Martínez, José
    Conference on Design of Circuits and Integrated Systems
    Presentation's date: 2013-11-27
    Presentation of work at congresses

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    This paper deals with the design techniques of power efficient switching regulators intended for linear power amplifiers employing envelope tracking techniques in wideband wireless standards. The bottlenecks involve a tradeoff between ripple voltage, slew rate and bandwidth. The slew rate limitation is identified as the main challenge, then a `bang-bang¿ slew enhancement technique is proposed. This approach enables the use of efficient supply modulators in wideband power amplifiers. The proposed scheme does not significantly degrade PA efficiency and preserves the stability of the switching regulator. The prototype has been implemented using the TSMC 0.18 µm technology; schematic simulation results in Cadence® are presented to prove the concept.

    This paper deals with the design techniques of power efficient switching regulators intended for linear power amplifiers employing envelope tracking techniques in wideband wireless standards. The bottlenecks involve a tradeoff between ripple voltage, slew rate and bandwidth. The slew rate limitation is identified as the main challenge, then a ‘bang-bang’ slew enhancement technique is proposed. This approach enables the use of efficient supply modulators in wideband power amplifiers. The proposed scheme does not significantly degrade PA efficiency and preserves the stability of the switching regulator. The prototype has been implemented using the TSMC 0.18 µm technology; schematic simulation results in Cadence® are presented to prove the concept.

  • Supply modulator for linear wideband RF power amplifiers

     Turkson, Richard; Silva-Martínez, José; Martínez García, Herminio
    Seminario Anual de Automática, Electrónica Industrial e Instrumentación
    Presentation's date: 2013-07-11
    Presentation of work at congresses

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    This paper deals with the design techniques of power efficient switching regulators intended for linear power amplifiers employing envelope tracking techniques in wideband wireless standards. The bottlenecks involve a tradeoff between ripple voltage, slew rate and bandwidth. The slew rate limitation is identified as the main challenge, then a `bang-bang¿ slew-enhancement technique is proposed. This approach enables the use of efficient supply modulators in wideband power amplifiers. The proposed scheme does not significantly degrade PA efficiency and preserves the stability of the switching regulator. The prototype has been implemented using the TSMC 0.18 µm technology; schematic simulation results in Cadence ® are presented to prove the concept.

  • Envelope tracking technique with bang-bang slew-rate enhancer for linear wideband RF PAs

     Turkson, Richard; Prakash, Suraj; Silva-Martínez, José; Martínez García, Herminio
    IEEE International Midwest Symposium on Circuits and Systems
    Presentation's date: 2013-08-06
    Presentation of work at congresses

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    Chaotic behaviour in on-chip automatic tuning loops for continuous-time filters  Open access

     Martínez García, Herminio; El Aroudi, Abdelali; Alarcon Cot, Eduardo Jose; Poveda Lopez, Alberto
    Seminario Anual de Automática, Electrónica Industrial e Instrumentación
    Presentation's date: 2013-07-11
    Presentation of work at congresses

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    Continuous-time filters (CTF) with automatic tuning loops are nonlinear feedback systems with potential instability. While an appropriate small signal linear dynamic modeling of the tunable filter should be obtained for design purpose, its ability to predict the real nonlinear dynamic behavior of the system is limited. In order to overcome this problem, a general and systematic procedure is used to obtain a large signal nonlinear model. The obtained model can accurately predict nonlinear phenomena such as bifurcations and chaotic behavior. From this model, some numerical simulations results are presented in this paper. As far as the authors know, the observation of these phenomena in CTF with tuning loops has not been previously presented. Thus, the results obtained in this work can provide some help to obtain improved controllers (with higher bandwidth and better performance) for the two involved control loops.

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    Output-capacitorless CMOS LDO regulator based on high slew-rate current-mode transconductance amplifier  Open access

     Saberkari, Alireza; Fathipour, Rasoul; Martínez García, Herminio; Poveda Lopez, Alberto; Alarcon Cot, Eduardo Jose
    IEEE International Symposium on Circuits and Systems
    Presentation's date: 2013-05-21
    Presentation of work at congresses

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    A low quiescent current output-capacitorless CMOS LDO regulator based on a high slew-rate current-mode transconductance amplifier (CTA) as an error amplifier is presented. Load transient characteristic of the proposed LDO is improved even at low quiescent currents, by using a local common-mode feedback (LCMFB) in the proposed CTA. This provides an increase in the order of transfer characteristic of the circuit, thereby enhancing the slew-rate at the gate of pass transistor. The proposed CTA-based LDO topology has been designed and post-layout simulated in HSPICE, in a 0.18 µm CMOS process to supply a load current between 0-100 mA. Postlayout simulation results reveal that the proposed LDO is stable without any internal compensation strategy and with on-chip output capacitor or lumped parasitic capacitances at the output node between 10-100 pF.

    A low quiescent current output-capacitorless CMOS LDO regulator based on a high slew-rate current-mode transconductance amplifier (CTA) as an error amplifier is presented. Load transient characteristic of the proposed LDO is improved even at low quiescent currents, by using a local common-mode feedback (LCMFB) in the proposed CTA. This provides an increase in the order of transfer characteristic of the circuit, thereby enhancing the slew-rate at the gate of pass transistor. The proposed CTA-based LDO topology has been designed and post-layout simulated in HSPICE, in a 0.18 μm CMOS process to supply a load current between 0-100 mA. Postlayout simulation results reveal that the proposed LDO is stable without any internal compensation strategy and with on-chip output capacitor or lumped parasitic capacitances at the output node between 10-100 pF.

  • On `Discussion on Barkhausen and Nyquist stability criteria¿

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda; Gamiz Caro, Juan
    Analog integrated circuits and signal processing
    Date of publication: 2012-03-01
    Journal article

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    The present article is related to the recently published paper given in Singh (Analog Integr Circuits Signal Process, 62, 327¿332, 2010), which depicts the failure of Barkhausen criterion concerning the determination of condition of oscillation for startup of sinusoidal oscillation. In particular, the sinusoidal oscillator circuit considered in this article is one of the possible four alternatives of the Wien-bridge oscillator (WBO). In other previous articles by the same forementioned author (Singh, Analog Integr Circuits Signal Process 48, 251¿255, 2006; Singh, Analog Integr Circuits Signal Process 50, 127¿132, 2007), some examples are provided with the objective of sustaining this hypothesis. In this article, however, the study of RC oscillator circuits based on the Barkhausen criterion is reconsidered. This point of view involves to consider the classical structure of a sinusoidal oscillator as a system consisting of a positive feedback loop composed of a general amplifier block (with its corresponding local negative feedback that stabilizes the gain) plus a general passive network. Taking into account this point of view, it is shown that Barkhausen criterion (specifically, the practical form of this criterion) allows to predict properly the startup of oscillations of the circuit considered in the article (Singh 2010).

  • Premis CETIB 2012 - Premis d'Enginyeria i Societat

     Martínez García, Herminio; Tutusaus Carreté, Pol
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  • Premi al Millor Projecte de Final de Carrera CETIB 2012

     Martínez García, Herminio
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  • Premi al Millor Projecte Final de Carrera

     Martínez García, Herminio
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  • Current-mode one-cycle control applied to linear¿assisted DC/DC converters

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda
    IEEE International Conference on Emerging Technologies and Factory Automation
    Presentation's date: 2012-09-18
    Presentation of work at congresses

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    This article shows the proposal of a current-mode one-cycle control for linear-assisted DC/DC converters. Linear-assisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: voltage linear regulators (classic NPN topology or LDO - low dropout -) and switching DC/DC converters. The current-mode one-cycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. Thus, the paper shows the design and simulation results of the proposed current-mode one-cycle linear-assisted converter.

    This article shows the proposal of a current-mode one-cycle control for linear-assisted DC/DC converters. Linear-assisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: voltage linear regulators (classic NPN topology or LDO –low dropout–) and switching DC/DC converters. The current-mode onecycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. Thus, the paper shows the design and simulation results of the proposed currentmode one-cycle linear-assisted converter.

  • Field programmable switched-capacitor voltage converter

     Martínez García, Herminio; Cosp Vilella, Jordi
    IEEE International Midwest Symposium on Circuits and Systems
    Presentation's date: 2012-08-06
    Presentation of work at congresses

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    In this paper we show two different schemes to implement a field programmable circuit that can connect 'n' capacitors as a charge-pump of, eventually, any topology and switching pattern. Capacitor connectivity is configured by means of registers that control multiplexers that, in turn, select the phase signal that controls each switch. It is also shown that, with any of these schemes, dynamic configuration of the circuit may be achieved by simply adding additional control phases.

    In this paper we show two different schemes to implement a field programmable circuit that can connect 'n' capacitors as a charge-pump of, eventually, any topology and switching pattern. Capacitor connectivity is configured by means of registers that control multiplexers that, in turn, select the phase signal that controls each switch. It is also shown that, with any of these schemes, dynamic configuration of the circuit may be achieved by simply adding additional control phases.

  • Current¿mode one-cycle control applied to linear-assisted DC/DC converters

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda
    IEEE International Conference on Emerging Technologies and Factory Automation
    Presentation's date: 2012-09-18
    Presentation of work at congresses

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    This article shows the proposal of a current-mode one-cycle control for linear-assisted DC/DC converters. Linear-assisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: voltage linear regulators (classic NPN topology or LDO ¿low dropout¿) and switching DC/DC converters. The current-mode onecycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. Thus, the paper shows the design and simulation results of the proposed currentmode one-cycle linear-assisted converter.

    This article shows the proposal of a current-mode one-cycle control for linear-assisted DC/DC converters. Linear-assisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: voltage linear regulators (classic NPN topology or LDO –low dropout–) and switching DC/DC converters. The current-mode onecycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. Thus, the paper shows the design and simulation results of the proposed currentmode one-cycle linear-assisted converter.

  • Electronically tunable switch¿mode high-efficiency adaptive band-pass filters for energy harvesting applications

     Gómez Cid-Fuentes, Raül; Martínez García, Herminio; Poveda Lopez, Alberto; Alarcon Cot, Eduardo Jose
    IEEE International Symposium on Circuits and Systems
    Presentation's date: 2012-05-22
    Presentation of work at congresses

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    Wireless Sensor Networks (WSN) present a pending challenge for a complete deployability due to energy requirements. The Self-Powered WSN approach aims to extend the sensor node life by means of Energy Harvesting. The harvested energy presents an erratic behavior in both time and frequency. In this paper, a new concept of switch-mode electronically tunable band-pass filters is presented to adaptively follow the power source variations and to maximize the power transfer. To implement these switch-mode filters, three alternatives are presented. These filter topologies are modeled and evaluated. Additionally, some design guidelines are provided. The results show how these high efficiency topologies present a band-pass behavior whose center frequency can be electronically tuned over one decade. The results target the integration of these highefficiency switch-mode band-pass filters into the future harvesting front-ends.

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    Innovación en la enseñanza de la Electrónica de Adquisición de Datos y Control para estudiantes de ingenieria de la rama Industrial  Open access

     Martínez García, Herminio; Domingo Peña, Joan; Grau Saldes, Antoni
    Jornada de Innovación Docente
    Presentation's date: 2012-07-06
    Presentation of work at congresses

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    La mejora de la calidad en los sistemas de adquisición de datos y de control industrial, dentro del campo de la ingeniería, está íntimamente relacionada con el conocimiento de la base en la que se asientan los sistemas electrónicos para tal fin. Dentro de la oferta de asignaturas optativas en la Escuela de Ingeniería Técnica Industrial de Barcelona (EUETIB) de la Universidad Politécnica de Cataluña (UPC), aparecidas a raíz de la puesta en marcha de los actuales planes de estudio de Grado de Ingeniería en la rama industrial, y dentro del marco del EEES, este curso 2011-12 ha aparecido una asignatura, Mecatrónica (MEC), que permite a estudiantes de los citados grados, y que no son de Electrónica, adentrarse en los conocimientos de esta materia. Esta asignatura deriva de la asignatura Electrónica de Adquisición de Datos y Control Industrial (EADCI), que ha permitido, en este caso, al estudiante de la especialidad de Electricidad de la EUETIB, aparecida a raíz de la puesta en marcha del plan de estudios 2002, el estudio de dicha materia. La presente comunicación expone la evolución de la enseñanza de la Electrónica, especialmente para adquisición de datos y control, dentro de los últimos planes de estudio en las diferentes especialidades de Ingeniería Técnica Industrial en la EUETIB, y, actualmente, en los estudios de grado (sin ser de la especialidad de Ingeniería Electrónica). El artículo refleja la filosofía de impartición y contenidos de la asignatura EADCI, de forma que analiza la orientación que se ha pretendido dar, y que ha permitido su rápida adaptación a la nueva asignatura MEC, dentro del nuevo marco de asignaturas ofertadas en la EUETIB en el EEES donde, además de las horas de teoría, problemas y laboratorio, ha de darse cabida a las denominadas `actividades dirigidas¿ que el nuevo plan contempla.

    La mejora de la calidad en los sistemas de adquisición de datos y de control industrial, dentro del campo de la ingeniería, está íntimamente relacionada con el conocimiento de la base en la que se asientan los sistemas electrónicos para tal fin. Dentro de la oferta de asignaturas optativas en la Escuela de Ingeniería Técnica Industrial de Barcelona (EUETIB) de la Universidad Politécnica de Cataluña (UPC), aparecidas a raíz de la puesta en marcha de los actuales planes de estudio de Grado de Ingeniería en la rama industrial, y dentro del marco del EEES, este curso 2011-12 ha aparecido una asignatura, Mecatrónica (MEC), que permite a estudiantes de los citados grados, y que no son de Electrónica, adentrarse en los conocimientos de esta materia. Esta asignatura deriva de la asignatura Electrónica de Adquisición de Datos y Control Industrial (EADCI), que ha permitido, en este caso, al estudiante de la especialidad de Electricidad de la EUETIB, aparecida a raíz de la puesta en marcha del plan de estudios 2002, el estudio de dicha materia. La presente comunicación expone la evolución de la enseñanza de la Electrónica, especialmente para adquisición de datos y control, dentro de los últimos planes de estudio en las diferentes especialidades de Ingeniería Técnica Industrial en la EUETIB, y, actualmente, en los estudios de grado (sin ser de la especialidad de Ingeniería Electrónica). El artículo refleja la filosofía de impartición y contenidos de la asignatura EADCI, de forma que analiza la orientación que se ha pretendido dar, y que ha permitido su rápida adaptación a la nueva asignatura MEC, dentro del nuevo marco de asignaturas ofertadas en la EUETIB en el EEES donde, además de las horas de teoría, problemas y laboratorio, ha de darse cabida a las denominadas ‘actividades dirigidas’ que el nuevo plan contempla.

  • Field programmable switched capacitor voltage-converter

     Martínez García, Herminio; Liu, Chao; Cosp Vilella, Jordi
    IEEE International Conference on Electronics, Circuits and Systems
    Presentation's date: 2012-12-12
    Presentation of work at congresses

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    In this paper, we show the Field Programmable Charge Pump (FPCP) concept in which the FPGA concept is applied to Charge Pump DC-DC converters. With this scheme, a fully programmable circuit is obtained to implement any Charge Pump topology and voltage conversion ratio with the same circuit. According to presented simulation results, the FPCP has only a slight performance loss due to programmability compared to a fixed Charge Pump.

  • Access to the full text
    La introducción de la actividad dirigida en la enseñanza de la electrónica analógica para estudiantes del grado de Electrónica Industrial y Automática  Open access

     Martínez García, Herminio; Domingo Peña, Joan; Grau Saldes, Antoni
    Jornada de Innovación Docente
    Presentation's date: 2012-07-06
    Presentation of work at congresses

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    A pesar del indiscutible avance y desarrollo de la electrónica y los sistemas digitales, es bien cierto que la electrónica analógica, y especial aquélla que incide directamente en el amplificador operacional realimentado en tensión y sus aplicaciones, es uno de los pilares fundamentales sobre los que se asientan los modernos planes de estudio para estudiantes de electrónica en diferentes ámbitos de la ingeniería (industrial, telecomunicaciones, etc.). Dentro de la oferta de asignaturas troncales de la titulación de Grado de Ingeniería en Electrónica Industrial y Automática (EIA) de la Escuela de Ingeniería Técnica Industrial de Barcelona (EUETIB) de la Universidad Politécnica de Cataluña (UPC), aparecidas a raíz de la puesta en marcha del actual plan de estudios de grado, dentro de Espacio Europeo de Educación Superior (EEES), existe una asignatura, Electrónica Analógica (EAEIA), que permite al estudiante de la citada especialidad adentrarse en los conocimientos de esta materia. La presente comunicación expone la filosofía de esta asignatura, de forma que analiza la orientación que se pretender dar, en especial dentro del nuevo marco de asignaturas ofertadas en la EUETIB donde, además de las horas de teoría, problemas y laboratorio, ha de darse cabida a las actividades dirigidas que el nuevo plan contempla.

    A pesar del indiscutible avance y desarrollo de la electrónica y los sistemas digitales, es bien cierto que la electrónica analógica, y especial aquélla que incide directamente en el amplificador operacional realimentado en tensión y sus aplicaciones, es uno de los pilares fundamentales sobre los que se asientan los modernos planes de estudio para estudiantes de electrónica en diferentes ámbitos de la ingeniería (industrial, telecomunicaciones, etc.). Dentro de la oferta de asignaturas troncales de la titulación de Grado de Ingeniería en Electrónica Industrial y Automática (EIA) de la Escuela de Ingeniería Técnica Industrial de Barcelona (EUETIB) de la Universidad Politécnica de Cataluña (UPC), aparecidas a raíz de la puesta en marcha del actual plan de estudios de grado, dentro de Espacio Europeo de Educación Superior (EEES), existe una asignatura, Electrónica Analógica (EAEIA), que permite al estudiante de la citada especialidad adentrarse en los conocimientos de esta materia. La presente comunicación expone la filosofía de esta asignatura, de forma que analiza la orientación que se pretender dar, en especial dentro del nuevo marco de asignaturas ofertadas en la EUETIB donde, además de las horas de teoría, problemas y laboratorio, ha de darse cabida a las actividades dirigidas que el nuevo plan contempla.

  • Diseño e implementación de un amplificador híbrido lineal-conmutado con amplio margen de salida

     Martínez García, Herminio
    Seminario Anual de Automática, Electrónica Industrial e Instrumentación
    Presentation's date: 2012-07-12
    Presentation of work at congresses

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    El presente trabajo presenta una técnica de diseño alternativa a los clásicos amplificadores de potencia en clase D. Como es sabido, éstos están basados en estructuras convertidoras continua¿continua (DC/DC) con control PWM, en los que la señal de referencia que fija el ciclo de trabajo de los interruptores del amplificador es la propia señal de audio a amplificar. En la técnica mostrada, se hace uso de un amplificador en clase AB auxiliar, cuyo objetivo es obtener una señal de salida proporcional a la de entrada (señal a amplificar), libre de rizados espúreos y transitorios. Además, un convertidor conmutado, en paralelo con el amplificador en clase AB, permite proporcionar prácticamente la totalidad de la corriente demandada por la carga. La finalidad del conjunto es la de obtener altos rendimientos, propios de los amplificadores en clase D, pero aprovechando las excelentes características de inexistencia de rizados y elevada velocidad que poseen los amplificadores en clase AB.

  • Power gyrator structures and their use as cells for energy processing in photovoltaic solar facilities

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda; Gamiz Caro, Juan
    IEEE International Conference on Emerging Technologies and Factory Automation
    Presentation's date: 2012-09-18
    Presentation of work at congresses

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    This paper provides a classification of high efficiency switching power-gyrator structures and their use as cells for energy processing in photovoltaic solar facilities. Having into account the properties of these topologies presented in the article, their inclusion in solar facilities allows increasing the performance of the whole installation. Thus, the design, simulation and implementation of a G-type power gyrator are carried out throughout the text. In addition, in order to obtain the maximum power from the photovoltaic solar panel, a maximum power point tracking (MPPT) is mandatory in the energy processing path. Therefore, the practical implementation carried out includes a control loop of the power gyrator in order to track the aforementioned maximum power point of the photovoltaic solar panel.

    This paper provides a classification of high efficiency switching power-gyrator structures and their use as cells for energy processing in photovoltaic solar facilities. Having into account the properties of these topologies presented in the article, their inclusion in solar facilities allows increasing the performance of the whole installation. Thus, the design, simulation and implementation of a G-type power gyrator are carried out throughout the text. In addition, in order to obtain the maximum power from the photovoltaic solar panel, a maximum power point tracking (MPPT) is mandatory in the energy processing path. Therefore, the practical implementation carried out includes a control loop of the power gyrator in order to track the aforementioned maximum power point of the photovoltaic solar panel.

  • Electronically tunable switch-mode high-efficiency adaptive band-pass filters for energy harvesting applications

     Gómez Cid-Fuentes, Raül; Martínez García, Herminio; Poveda Lopez, Alberto; Alarcon Cot, Eduardo Jose
    IEEE International Symposium on Circuits and Systems
    Presentation's date: 2012-05-21
    Presentation of work at congresses

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  • Fast transient response CFA-based LDO regulator

     Saberkari, Alireza; Martínez García, Herminio; Alarcon Cot, Eduardo Jose
    IEEE International Symposium on Circuits and Systems
    Presentation's date: 2012-05-22
    Presentation of work at congresses

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  • Field programmable switched capacitor voltage converter

     Martínez García, Herminio; Cosp Vilella, Jordi
    IEEE International Midwest Symposium on Circuits and Systems
    Presentation's date: 2012-08-07
    Presentation of work at congresses

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    In this paper we show two different schemes to implement a field programmable circuit that can connect n capacitors as a charge-pump of, eventually, any topology and switching pattern. Capacitor connectivity is configured by means of registers that control multiplexers that, in turn, select the phase signal that controls each switch. It is also shown that, with any of these schemes, dynamic configuration of the circuit may be achieved by simply adding additional control phases

  • Ripple-based prediction of fast-scale instabilities in current mode controlled switching converters

     Rodríguez Rodríguez, Enric; Martínez García, Herminio; Guinjoan Gispert, Francisco; El Aroudi, Abdelali; Poveda Lopez, Alberto; Alarcon Cot, Eduardo Jose
    IEEE International Symposium on Circuits and Systems
    Presentation's date: 2012-05-22
    Presentation of work at congresses

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  • Field programmable switched capacitor voltage converter

     Li, Chao; Cosp Vilella, Jordi; Martínez García, Herminio
    IEEE International Conference on Electronics, Circuits and Systems
    Presentation's date: 2012-12-12
    Presentation of work at congresses

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    In this paper, we show the Field Programmable Charge Pump (FPCP) concept in which the FPGA concept is applied to Charge Pump DC-DC converters. With this scheme, a fully programmable circuit is obtained to implement any Charge Pump topology and voltage conversion ratio with the same circuit. According to presented simulation results, the FPCP has only a slight performance loss due to programmability compared to a fixed Charge Pump

  • La introducción de la actividad dirigida en la enseñanza de la electrónica analógica para estudiantes del grado de Electrónica Industrial y Automática

     Martínez García, Herminio; Domingo Peña, Joan; Grau Saldes, Antoni
    Jornada d'innovació Docent
    Presentation's date: 2012-07-05
    Presentation of work at congresses

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  • Innovación en la enseñanza de la electrónica de adquisición de datos y control para estudiantes de ingeniería de la rama industrial

     Martínez García, Herminio; Domingo Peña, Joan; Grau Saldes, Antoni
    Jornada d'innovació Docent
    Presentation's date: 2012-07-05
    Presentation of work at congresses

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    Chaos controller for switching regulators aiming enhanced design-space towards miniaturization  Open access

     Rodríguez Rodríguez, Enric; El Aroudi, Abdelali; Martínez García, Herminio; Poveda Lopez, Alberto; Iu, H.; Alarcon Cot, Eduardo Jose
    International Symposium on Nonlinear Theory and its Applications
    Presentation's date: 2012-10-25
    Presentation of work at congresses

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    This paper tackles the control of fast-scale instabilities in a buck switching power converter aiming to expand its design-space towards miniaturization. After briefly revisiting the working principle of existing chaos controllers, the paper explores an alternative approach based on amplifying the harmonic at the switching frequency. Numerical simulations show that the proposed controller can concurrently improve both fast-scale and slow-scale stability margins. Finally, the paper proposes a chaos controller combined with an output ripple reduction network and studies their interaction with the aim of achieving both low-ripple and improved stability.

  • Access to the full text
    Diseño e implementación de un amplificador híbrido lineal¿conmutado con amplio margen de salida  Open access

     Martínez García, Herminio
    Seminario Anual de Automática, Electrónica Industrial e Instrumentación
    Presentation's date: 2012-07-12
    Presentation of work at congresses

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    El presente trabajo presenta una técnica de diseño alternativa a los clásicos amplificadores de potencia en clase D. Como es sabido, éstos están basados en estructuras convertidoras continua–continua (DC/DC) con control PWM, en los que la señal de referencia que fija el ciclo de trabajo de los interruptores del amplificador es la propia señal de audio a amplificar. En la técnica mostrada, se hace uso de un amplificador en clase AB auxiliar, cuyo objetivo es obtener una señal de salida proporcional a la de entrada (señal a amplificar), libre de rizados espúreos y transitorios. Además, un convertidor conmutado, en paralelo con el amplificador en clase AB, permite proporcionar prácticamente la totalidad de la corriente demandada por la carga. La finalidad del conjunto es la de obtener altos rendimientos, propios de los amplificadores en clase D, pero aprovechando las excelentes características de inexistencia de rizados y elevada velocidad que poseen los amplificadores en clase AB.

  • Access to the full text
    Design of a 4.5-V, 450-mA low-dropout voltage linear regulator based on a cascoded OTA  Open access

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda
    Seminario Anual de Automática, Electrónica Industrial e Instrumentación
    Presentation's date: 2012-07-12
    Presentation of work at congresses

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    This article aims to present the design of a 4.5-V, 450-mA low drop-out (LDO) voltage linear regulator based on a twostage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (T¿) of 0.025 mV/ºC. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 µm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.

    This article aims to present the design of a 4.5-V, 450-mA low drop-out (LDO) voltage linear regulator based on a twostage cascoded operational transconductance amplifier (OTA) as error amplifier. The aforementioned two-stage OTA is designed with cascoded current mirroring technique to boost up the output impedance. The proposed OTA has a DC gain of 101 dB under no load condition. The designed reference voltage included in the LDO regulator is provided by a band gap reference with the temperature coefficient (Tγ) of 0.025 mV/ºC. The proposed LDO regulator has a maximum drop-out voltage of 0.5 V @ 450 mA of load current, and has the worst case power supply rejection ratio (PSRR) of [54.5 dB, 34.3 dB] @ [100 Hz, 10 kHz] in full load condition. All the proposed circuits are designed using a 0.35 μm CMOS technology. The design is checked in order to corroborate its performance for wide range of input voltage, founding that the circuit design works fine meeting all the initial specification requirements.

  • Fractional DC-DC converter in solar-powered electrical generation systems

     Martinez Gonzalez, Ruben; Bolea Monte, Yolanda; Grau Saldes, Antoni; Martínez García, Herminio
    International Journal of Electrical Energy Systems
    Date of publication: 2011
    Journal article

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    This paper deals with the fractional modeling of a DC-DC buck-boost converter, suitable in solar-powered electrical generation systems, and the design of a fractional controller for the aforementioned switching converter. Although the modeling and design of the controller is carried out for this particular DC-DC converter, it can be easily extended to other kind of switching converter. In addition, the comparison between integer-order plan/controller and fractional-order plants/controller is carried out. The article also shows that, under the same design conditions, the fractional-order controller has a better performance and behaviour than the classical integer-order controller in both situations, that is, with integer-order plant and fractional-order plant models.

  • Circuitos de gestión de energia adaptativos y miniaturizados para recolectores de energía en redes de sensores inalámbricos (WSN)

     Alarcon Cot, Eduardo Jose; Vidal Lopez, Eva Maria; Conesa Roca, Alfons; Poveda Lopez, Alberto; Roman Lumbreras, Manuel; Martínez García, Herminio
    Participation in a competitive project

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  • Organización del IEEE International Conference on Computer Vision ICCV2011

     Manzanares Brotons, Manuel; Bolea Monte, Yolanda; Gamiz Caro, Juan; Martínez García, Herminio; Grau Saldes, Antoni
    Participation in a competitive project

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  • Organització del 13th IEEE International Conference on Computer Vision 2011

     Manzanares Brotons, Manuel; Bolea Monte, Yolanda; Gamiz Caro, Juan; Martínez García, Herminio; Grau Saldes, Antoni
    Participation in a competitive project

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  • LPV model for PV cell and fractional control of DC-DC converter for photovoltaic systems

     Martinez Gonzalez, Ruben; Bolea Monte, Yolanda; Grau Saldes, Antoni; Martínez García, Herminio
    IEEE International Symposium on Industrial Electronics
    Presentation's date: 2011-06-28
    Presentation of work at congresses

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    This paper deals with the fractional modelling of a DC-DC converter, suitable in solar-powered electrical generation systems, and the design of a fractional controller for the aforementioned switching converter. A new model for PV cells is proposed in order to obtain a linear equation for V-I characteristic via scheduling dependence of temperature and irradiance. Due to the fractional nature of the ultracapacitors this kind of controller gives a suitable and good performance.

  • Parallel linear-assisted DC-DC switching converter

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda; Gamiz Caro, Juan
    Seminar for Advanced Industrial Control Applications
    Presentation's date: 2011-11-07
    Presentation of work at congresses

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    Current-mode one-cycle control applied to linear¿assisted DC/DC converters  Open access

     Martínez García, Herminio; Grau Saldes, Antoni; Bolea Monte, Yolanda; Gamiz Caro, Juan
    Seminar for Advanced Industrial Control Applications
    Presentation's date: 2011-11-07
    Presentation of work at congresses

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    This article shows the proposal of an current-mode one-cycle control for linear-assisted DC/DC converters. Linear-assisted DC/DC converters are structures that allow to take advantages of the two classic alternatives in the design of power supply systems: voltage linear regulators (classic NPN topology or LDO –low dropout–) and switching DC/DC converters. The current-mode one-cycle control technique is proposed in order to obtain the duty cycle of the linear-assisted converter switch. The proposed structure can provide an output with suitable load and line regulations. The paper shows the design and simulation results of the proposed current-mode one-cycle linearassisted converter.