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  • Components and Systems for Comnunications Research Group

     Mateu Mateu, Jordi; Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Bertran Alberti, Eduardo; Berenguer Sau, Jordi; González Arbesú, José María; Rocas Cantenys, Eduard; Verdu Tirado, Jorge Andres; Hueltes Escobar, Alberto; Gelonch Bosch, Antoni; Collado Gomez, Juan Carlos
    Competitive project

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  • Analysis of variations of volterra series models for RF power amplifiers

     Silveira, Daniel D.; Gilabert Pinal, Pere Lluis; Dos Santos, Alexandre B.; Gadringer, Michael E.
    IEEE microwave and wireless components letters
    Vol. 23, num. 8, p. 442-444
    DOI: 10.1109/LMWC.2013.2268456
    Date of publication: 2013
    Journal article

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    This article discusses several different implementations of Volterra series models, and performs a fair comparison between them using measured data and well known figures of merit. Among the implemented models, an approach that uses sub-sampling techniques together with Volterra series in a parallel cascade structure shows an improved performance compared to the other variations of Volterra series models. Based on the results, new trends in RF power amplifier behavioral modeling are suggested.

    This article discusses several different implementations of Volterra seriesmodels, and performs a fair comparison between them using measured data and well known figures of merit. Among the implemented models, an approach that uses sub-sampling techniques together with Volterra series in a parallel cascade structure shows an improved performance compared to the other variations of Volterra seriesmodels.Based on the results, new trends in RF power amplifier behavioral modeling are suggested.

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    Computationally efficient real-time digital predistortion architectures for envelope tracking power amplifiers  Open access

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    International journal of microwave and wireless technologies
    Vol. 5, num. 2, p. 187-193
    DOI: 10.1017/S1759078713000135
    Date of publication: 2013-03-05
    Journal article

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    This paper presents and discusses two possible real-time digital predistortion (DPD) architectures suitable for envelope tracking (ET) power amplifiers (PAs) oriented at a final computationally efficient implementation in a field programmable gate array (FPGA) device. In ET systems, by using a shaping function is possible to modulate the supply voltage according to different criteria. One possibility is to use slower versions of the original RF signal's envelope in order to relax the slew-rate (SR) and bandwidth (BW) requirements of the envelope amplifier (EA) or drain modulator. The nonlinear distortion that arises when performing ET with a supply voltage signal that follows both the original and the slow envelope will be presented, as well as the DPD function capable of compensating for these unwanted effects. Finally, two different approaches for efficiently implementing the DPD functions, a polynomial-based and a look-up table-based, will be discussed.

    This paper presents and discusses two possible real-time digital predistortion (DPD) architectures suitable for envelope tracking (ET) power amplifiers (PAs) oriented at a final computationally efficient implementation in a field programmable gate array (FPGA) device. In ET systems, by using a shaping function is possible to modulate the supply voltage according to different criteria. One possibility is to use slower versions of the original RF signal’s envelope in order to relax the slew-rate (SR) and bandwidth (BW) requirements of the envelope amplifier (EA) or drain modulator. The nonlinear distortion that arises when performing ET with a supply voltage signal that follows both the original and the slow envelope will be presented, as well as the DPD function capable of compensating for these unwanted effects. Finally, two different approaches for efficiently implementing the DPD functions, a polynomial-based and a look-up table-based, will be discussed.

  • Order reduction of wideband digital predistorters using principal component analysis

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; López Bueno, David; Bartzoudis, Nikolaos; Bertran Alberti, Eduardo; Payaró Llisterri, Miquel; Hourtane, Alain
    IEEE International Microwave Symposium
    p. 1-4
    DOI: 10.1109/MWSYM.2013.6697687
    Presentation's date: 2013-06-06
    Presentation of work at congresses

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    This paper presents how to apply order reduction in wide-band digital predistortion (DPD) linearizers using the principal component analysis (PCA) technique. This method is tested in a wireless backhauling transmitter where four 28 MHz adjacent subcarrier transmission of M-QAM signals are considered. The DPD has to counteract not only the PA nonlinear behavior, but also its dynamics. This may results critical when considering wideband signals since the number of coefficients required to model memory effects can grow dramatically. By applying the PCA technique, the number of essential parameters can be significantly reduced. In addition, a strategy to minimize the computational cost of finding the optimal coefficients is also presented. A test-bed for evaluating the DPD linearization performance of the RF subsystem when PCA is applied was deployed and experimental results are presented in this paper

  • Reducción de orden en predistorsión digital para aplicaciones de banda ancha

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; López Bueno, David; Bartzoudis, Nikolaos; Payaró Llisterri, Miquel; Hourtane, Alain
    Simposium Nacional de la Unión Científica Internacional de Radio
    p. 1-4
    Presentation's date: 2013-09-11
    Presentation of work at congresses

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    This paper presents how to apply order reduction in wide-band digital predistortion (DPD) linearizers using the principal component analysis (PCA) technique. This method is tested in a wireless backhauling transmitter where four 28 MHz adjacent subcarrier transmission of M-QAM signals are considered. The DPD has to counteract not only the PA nonlinear behavior, but also its dynamics. This may results critical when considering wideband signals since the number of coefficients required to model memory effects can grow dramatically. By applying the PCA technique, the number of essential parameters can be significantly reduced. In addition, a strategy to minimize the computational cost of finding the optimal coefficients is also presented. A test-bed for evaluating the DPD linearization performance of the RF subsystem when PCA is applied was deployed and experimental results are presented in this paper.

  • Transmisor polar para señales de banda ancha integrando inversión y rectificación síncrona clase E a 1 GHz

     Ruiz Lavin, Maria Nieves; Marante, Reinel; García García, José Ángel; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    Simposium Nacional de la Unión Científica Internacional de Radio
    Presentation's date: 2013-09-12
    Presentation of work at congresses

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    In this paper, class E inverting and synchronous rectifying functions, implemented over GaN HEMT dies, are properly integrated for the design of a 1 GHz polar transmitting architecture. Employing high-Q lumped-element passive networks, an implementation with a high power density also results. The amplitude and phase components of a 5 MHz multisine are shown to be properly recombined at the output of an 80% efficient RF power amplifier (RFPA), drain modulated by means of a resonant DC/DC converter with a peak efficiency of 77%. A frequency-modulation (FM) coding of the envelope is here proposed for the converter, resulting in a 20 MHz large-signal bandwidth and a 720 V/µSeg slew-rate value.

  • 3D digital predistortion for dual-band envelope tracking power amplifiers

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; López Bueno, David; García García, José Ángel
    Asia-Pacific Microwave Conference
    p. 734-736
    DOI: 10.1109/APMC.2013.6694913
    Presentation's date: 2013-11-06
    Presentation of work at congresses

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    This paper proposes a novel three-dimensional digital predistorter (3D-DPD) suitable for compensating nonlinear distortion in dual-band (DB) envelope tracking (ET) power amplifiers (PAs). By taking into account the cross-band modulation effects (due to DB operation) and the slow-envelope dependent distortion effects (due to ET), the 3D-DPD is design by properly modifying the memory polynomial (MP) behavioral model. In a first approach, the accuracy and reliability of the proposed 3D-MP model are evaluated. Finally, experimental results are shown to validate the linearization performance of the proposed 3D-DPD.

  • Soluciones de procesado digital de la señal para sistemas inalambricos sostenibles y reconfigurables

     Montoro López, Gabriel; Bertran Alberti, Eduardo; Berenguer Sau, Jordi; Gelonch Bosch, Antoni; Marojevic, Vuk; Vizarreta Paz, Pedro Pablo; Gómez, Ismael; Gomez Miguelez, Ismael; Gilabert Pinal, Pere Lluis
    Competitive project

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  • Look-up table implementation of a slow envelope dependent digital predistorter for envelope tracking power amplifiers

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    IEEE microwave and wireless components letters
    Vol. 22, num. 2, p. 97-99
    DOI: 10.1109/LMWC.2011.2181973
    Date of publication: 2012-02-13
    Journal article

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  • Slew-rate and efficiency trade-off in slow envelope tracking power amplifiers

     Vizarreta Paz, Pedro Pablo; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    Frequenz
    Vol. 66, num. 11/12, p. 323-329
    DOI: 10.1515/freq-2012-0101
    Date of publication: 2012-12-12
    Journal article

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    This paper presents a study on the trade-off between the envelope's slew-rate and the drain efficiency when slower envelopes are considered to dynamically supply the power amplifier (PA). This paper discusses a method to limit the slew-rate (and consequently the bandwidth) of the signal's envelope. Moreover, since the envelope tracking (ET) technique using a slower version of the original envelope introduces nonlinear distortion, slow envelope dependent predistortion has to be also incorporated in the design of ET PAs. Experimental results showed that it is possible to find a compromise between the bandwidth and slew-rate reduction (necessary to cope with the specific envelope amplifier requirements) and the amount of drain efficiency degradation suffered due to the use of a slower version of the original envelope

    This paper presents a study on the trade-off between the envelope’s slew-rate and the drain efficiency when slower envelopes are considered to dynamically supply the power amplifier (PA). This paper discusses a method to limit the slew-rate (and consequently the bandwidth) of the signal’s envelope. Moreover, since the envelope tracking (ET) technique using a slower version of the original envelope introduces nonlinear distortion, slow envelope dependent predistortion has to be also incorporated in the design of ET PAs. Experimental results showed that it is possible to find a compromise between the bandwidth and slew-rate reduction (necessary to cope with the specific envelope amplifier requirements) and the amount of drain efficiency degradation suffered due to the use of a slower version of the original envelope.

  • Resource management implications and strategies for SDR clouds

     Gómez, Ismael; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Gelonch Bosch, Antoni; Marojevic, Vuk
    Analog integrated circuits and signal processing
    Vol. 73, num. 2, p. 473-482
    DOI: 10.1007/s10470-012-9963-z
    Date of publication: 2012-09-19
    Journal article

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  • Envelope tracking amplification with reduced slew-rate and bandwidth envelopes

     Vizarreta Paz, Pedro Pablo; Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Bertran Alberti, Eduardo; Berenguer Sau, Jordi; Gelonch Bosch, Antoni; García García, José Ángel
    Simposium Nacional de la Unión Científica Internacional de Radio
    Presentation's date: 2012-09-13
    Presentation of work at congresses

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    This paper presents an Envelope Tracking Pow- er Amplifier whose architecture includes a Hybrid Envelope Amplifier (HEA) and an algorithm to adapt the envelope’s characteristics to the HEA’s limitations. The HEA attempts to combine the high efficiency of a switched amplifier with the wide band capabilities of a linear amplifier. A modified Slew Rate (SR) reduction algorithm cope with the bandwidth and SR limitations of the HEA. On the other hand, the non-linearities introduced by this Envelope Amplifier (EA) and by the dynamic supply are compensated using Digital Pre-Distortion. Results show that these non-linearities are compensable and that the architecture offers higher efficiency figures compared to the conventional linear EA

  • Slew-rate and efficiency trade-off in slow envelope tracking power amplifiers

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Vizarreta Paz, Pedro Pablo
    German Microwave Conference
    p. 1-4
    DOI: 10.1515/freq-2012-0101
    Presentation's date: 2012-03-12
    Presentation of work at congresses

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    This paper presents a study on the trade-off between the envelope's slew-rate and the drain efficiency when slower envelopes are considered to dynamically supply the power amplifier (PA). This paper discusses a method to limit the slew-rate (and consequently the bandwidth) of the signal's envelope. Moreover, since the envelope tracking (ET) technique using a slower version of the original envelope introduces nonlinear distortion, slow envelope dependent predistortion has to be also incorporated in the design of ET PAs. Experimental results showed that it is possible to find a compromise between the bandwidth and slew-rate reduction (necessary to cope with the specific envelope amplifier requirements) and the amount of drain efficiency degradation suffered due to the use of a slower version of the original envelope.

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    Advanced design features of Doherty power amplifiers  Open access

     Bertran Alberti, Eduardo; Gilabert Pinal, Pere Lluis; Berenguer Sau, Jordi
    Simposium Nacional de la Unión Científica Internacional de Radio
    p. 1-4
    Presentation's date: 2012-09-13
    Presentation of work at congresses

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    A Doherty power amplifier (DPA) is an effective structure born in 1936 which, after a scarce revival around year 2000), had been strengthened from 2005 because its capability to combine linear amplification with power efficiency. Despite the conceptual simplicity of its basic operation, a lot of practical drawbacks shrink the theoretical behavior, thus leading a significant number of research works to overcome them. The main objective in DPA research is to increase efficiency while maintaining linearity and filling the specified bandwidth. This paper presents a survey of the state of the art of DPA advanced design aspects. After a short review of the DPA operation principles, aspects regarding improvements for linearity, power efficiency and amplification bandwidth are introduced. Besides, some alternative structures and technologies, as well as practical design aspects and some trade-offs which the designer usually has to face are also presented.

  • Hybrid envelope amplifier for envelope tracking power amplifier transmitters

     Vizarreta Paz, Pedro Pablo; Montoro López, Gabriel; Gilabert Pinal, Pere Lluis
    European Microwave Conference
    p. 128-131
    Presentation's date: 2012-10-30
    Presentation of work at congresses

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    This paper presents an envelope tracking (ET) Power Amplifier (PA) whose architecture includes an efficient Envelope Amplifier (EA) and a bandwidth reduction algorithm suitable for real time applications. The EA consists of a hybrid amplifier combining switched and linear amplification. A bandwidth and slew-rate reduction algorithm has been incorporated in order to allow wide-band envelope amplifications. Non-linearities introduced by the Hybrid EA (HEA) and the dynamic supply are compensated with Digital Pre-Distortion. The ET PA has been tested using 64-QAM signals and commercial devices. Results show that non-linearities produced by the HEA are compensable and that the architecture provides efficiency improvements compared to the conventional linear EA.

    This paper presents an envelope tracking (ET) Power Amplifier (PA) whose architecture includes an efficient Envelope Amplifier (EA) and a bandwidth reduction algorithm suitable for real time applications. The EA consists of a hybrid amplifier combining switched and linear amplification. A band- width and slew-rate reduction algorithm has been incorporated in order to allow wide-band envelope amplifications. Non-linearities introduced by the Hybrid EA (HEA) and the dynamic supply are compensated with Digital Pre-Distortion. The ET PA has been tested using 64-QAM signals and commercial devices. Results show that non-linearities produced by the HEA are compens- able and that the architecture provides efficiency improvements compared to the conventional linear EA.

  • Transmisor outphasing en UHF usando amplificadores clase E a GaN HEMT

     Marante, Reinel; García García, José Ángel; Ruiz Lavin, Maria Nieves; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    Simposium Nacional de la Unión Científica Internacional de Radio
    Presentation's date: 2012-09-13
    Presentation of work at congresses

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    A Chireix outphasing transmitter at UHF band is presented in this paper, based on class E RF power amplifiers. As recently proved in [1], properly transforming the load modulation path, imposed by the non-isolated combiner, into fundamental frequency impedan ce values at the device drain terminals as close as possible to those assuring zero voltage switching condition, good efficiency values may be kept along a significant output power range. A lumped element implementation of the amplifiers and the combiner, together with the use of GaN HEMTs, allowed controlling the output power over a 6 dB range with an efficiency value over 60%. Experiments with asymmetrical two tones, conceived as a discrete spectrum signal with a 1:4 envelope variation, have shown the capability of the arch itecture to be linearized using digital predistortion (DPD). In order to reproduce a spectrally efficient communication signal, with nulls in the envelope, a hybrid control strategy was employed, combining the outphasing between branches with amplitude variations of both RF excitation signals for the lower range of the envelope. Average drain efficiency and PAE values of 63% and 60.3% respectively have been measu red, for a 11.8 W and 5.06 dB PAPR WCDMA signal, while m eeting ACPR specifications.

  • FPGA implementation of a real-time NARMA-based digital adaptive predistorter

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Bertran Alberti, Eduardo
    IEEE transactions on circuits and systems II: express briefs
    Vol. 58, num. 7, p. 402-406
    DOI: 10.1109/TCSII.2011.2158256
    Date of publication: 2011-07
    Journal article

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  • Power amplifier nonlinear modeling for digital predistortion

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    Date of publication: 2011-09-29
    Book chapter

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    Postprint (author’s final draft)

  • Look-up table based digital predistortion schemes and implementation

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    Date of publication: 2011-09-29
    Book chapter

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  • Digital processing compensation mechanisms for highly efficient transmitter architectures

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Vizarreta Paz, Pedro Pablo; Berenguer Sau, Jordi
    IET microwaves antennas and propagation
    Vol. 5, num. 8, p. 963-974
    DOI: 10.1049/iet-map.2010.0368
    Date of publication: 2011-06-06
    Journal article

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    El transmisor sostenible  Open access

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Bertran Alberti, Eduardo; Berenguer Sau, Jordi
    Telecos.cat. Enginyers de Telecomunicació
    num. 53, p. 16-18
    Date of publication: 2011-03-01
    Journal article

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  • Slew-rate limited envelopes for driving envelope tracking amplifiers

     Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Vizarreta Paz, Pedro Pablo; Bertran Alberti, Eduardo
    IEEE Radio & Wireless Symposium
    p. 17-20
    DOI: 10.1109/PAWR.2011.5725386
    Presentation's date: 2011-01-17
    Presentation of work at congresses

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    This paper presents a practical application of a method for generating slew-rate limited envelopes in order to drive the dynamic supply of envelope tracking (ET) power amplifiers (PAs). The proposed method results useful to generate slower versions of the transmitted signal’s envelope to cope with the slew-rate and bandwidth limitations of envelope amplifiers. Moreover, this paper shows experimental results comparing the performance of ET when exciting the drain of a PA (based in a GaN transistor) with both the envelope of the signal and the slew-rate limited version of the envelope.

  • SDR tools and projects for electrical engineering education

     Marojevic, Vuk; Gomez Miguelez, Ismael; Arteaga, Xavier; Gilabert Pinal, Pere Lluis; Gelonch Bosch, Antoni
    Wireless Innovation Forum Conference on Communications Technologies and Software Defined Radio
    p. 356-362
    Presentation of work at congresses

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    This paper focuses on the software-defined radio (SDR) educational aspects. We describe a few recent SDR projects and tools that were developed as part of a graduate electrical engineering course at the School on Telecommunication and Aerospace Engineering (EETAC) in Castelldefels, Barcelona. EETAC is part of the Polytechnic University of Catalonia (UPC). It applies the project based learning (PBL) concept and offers technical and scientific courses in Telecommunication and Aerospace Science and Technology (BSc, MSc, and PhD). The tools we describe here offer hands-on experience on several basic and advanced SDR principles. We describe our experience and the lessons learned.

  • Resource management strategies for SDR clouds

     Marojevic, Vuk; Gomez Miguelez, Ismael; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Gelonch Bosch, Antoni
    Wireless Innovation Forum Conference on Communications Technologies and Software Defined Radio
    p. 162-168
    Presentation of work at congresses

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  • Digital predistortion of envelope tracking amplifiers driven by slew-rate limited envelopes

     Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Berenguer Sau, Jordi; Bertran Alberti, Eduardo
    IEEE International Microwave Symposium
    p. 1-4
    Presentation's date: 2011-06-09
    Presentation of work at congresses

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  • Incremental behavioral modeling of envelope-dependent nonlinear distortion in dynamic supply power amplifiers

     Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Vizarreta Paz, Pedro Pablo
    Simposium Nacional de la Unión Científica Internacional de Radio
    p. 7-
    Presentation's date: 2011-09-08
    Presentation of work at congresses

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  • Gastos de Optimización de los Amplificadores de los BPM Instalados en la TBL de CTF3 i Financiación de Actividades de Colab. con CER

     Gilabert Pinal, Pere Lluis; Koubychine Merkulov, Youri Alexandrovich; Montoro López, Gabriel
    Competitive project

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  • Premi extraordinari de doctorat curs 2007-2008

     Cusido Roura, Jordi; Gilabert Pinal, Pere Lluis
    Award or recognition

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    A method for real-time generation of slew-rate limited envelopes in envelope tracking transmitters  Open access

     Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Bertran Alberti, Eduardo; Berenguer Sau, Jordi
    IEEE International Microwave Workshop Series on RF Front-Ends for Software Defined and Cognitive Radio Solutions
    p. 1-4
    Presentation's date: 2010-02-22
    Presentation of work at congresses

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    Arquitecturas de transmisión inalámbrica de alta eficiencia  Open access

     García García, José Ángel; de Mingo, Jesús; Montoro López, Gabriel; Cabria, Lorena; Marante, Reinel; García, Paloma; Sánchez, César; Bertran Alberti, Eduardo; Gilabert Pinal, Pere Lluis
    Simposium Nacional de la Unión Científica Internacional de Radio
    p. 1-4
    Presentation's date: 2010-09-15
    Presentation of work at congresses

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    Implementación de un transmisor LINC en un procesador FPGA  Open access

     Vizarreta Paz, Pedro Pablo; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Berenguer Sau, Jordi
    Simposium Nacional de la Unión Científica Internacional de Radio
    p. 1-4
    Presentation's date: 2010-09-15
    Presentation of work at congresses

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    Implementation issues in FPGA-controlled polar transmitters  Open access

     Gilabert Pinal, Pere Lluis; Cabria, Lorena; García García, José Ángel; Montoro López, Gabriel; Bertran Alberti, Eduardo
    European Microwave Week
    p. 711-714
    Presentation's date: 2010-09-30
    Presentation of work at congresses

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    FPGA-based set-up for RF power amplifier dynamic Supply with real-time digital adaptive predistortion  Open access

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Bertran Alberti, Eduardo; García García, José Ángel
    IEEE Radio & Wireless Symposium
    p. 1-4
    Presentation's date: 2010-01-12
    Presentation of work at congresses

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  • Nonlinear Auto Regressive Moving Average Models

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Bertran Alberti, Eduardo
    Date of publication: 2009-01-31
    Book chapter

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  • TECNICAS DIGITALES AVANZADAS PARA TECNOLOGIAS EMERGENTES EN TRASMISORES INALAMBRICOS

     Berenguer Sau, Jordi; Hernandez Marco, Jordi; Bertran Alberti, Eduardo; Delgado Penin, Jose A.; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel
    Competitive project

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    Analysis of inter-modulation products and nonlinear distortion in RF OFDM transmitter systems  Open access

     O'Droma, M; Lei, Y; Bertran Alberti, Eduardo; Gilabert Pinal, Pere Lluis
    IEEE Vehicular Technology Conference
    Presentation's date: 2009-04-26
    Presentation of work at congresses

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    An efficient combination of digital predistortion and OFDM clipping for power amplifiers  Open access

     Gilabert Pinal, Pere Lluis; Gadringer, ME; Montoro López, Gabriel; Mayer, ML; Silveira, DD; Bertran Alberti, Eduardo; Magerl, G
    International journal of RF and microwave computer-aided engineering
    Vol. 19, num. 5, p. 583-591
    Date of publication: 2009-09
    Journal article

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    This paper derives a general analytical expression of the feasibility condition for the uplink of a CDMA mobile communications system in a general scenario where the users in the system belong to an arbitrary number of service classes and the coverage deployment includes the presence of repeaters. An explicit expression of the admission region is derived and the dependencies on the parameter values are shown. An example is presented in order to illustrate the application of the proposed methodology in a real case.

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    Improvements and analysis of nonlinear parallel behavioral models  Open access

     Silveira, DD; Gilabert Pinal, Pere Lluis; Lavrador, PM; Pedro, JC; Gadringer, M; Montoro López, Gabriel; Bertran Alberti, Eduardo; Magerl, G
    International journal of RF and microwave computer-aided engineering
    Vol. 19, num. 5, p. 615-626
    DOI: 10.1002/mmce
    Date of publication: 2009-09
    Journal article

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    Behavioral modeling and linearization of a mm-wave power amplifier  Open access

     Melczarsky, I; Gilabert Pinal, Pere Lluis; Giacomo, Di V; Bertran Alberti, Eduardo; Filicori, F
    International journal of microwave and wireless technologies
    Vol. 1, num. -, p. 127-136
    DOI: 10.1017/S1759078709000075
    Date of publication: 2009-04
    Journal article

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    On passive bias networks for drain-modulated power amplifiers  Open access

     Bertran Alberti, Eduardo; García García, José Ángel; Montoro López, Gabriel; Gilabert Pinal, Pere Lluis; Berenguer Sau, Jordi
    International Symposium on Microwave and Optical Technology
    p. 34-36
    Presentation's date: 2009-12-16
    Presentation of work at congresses

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    Técnicas Emergentes de Mejora del Compromiso Eficiencia-Linealidad en Transmisores de Radiofrecuencia  Open access

     García García, José Ángel; de Mingo, Jesús; Montoro López, Gabriel; Cabria, Lorena; Marante, Reinel; García, Paloma; Sánchez, Cesar; Bertran Alberti, Eduardo; Gilabert Pinal, Pere Lluis
    Simposium Nacional de la Unión Científica Internacional de Radio
    Presentation's date: 2009-09-17
    Presentation of work at congresses

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    Postprint (author’s final draft)

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    FPGA implementation of an LMS-based real-time adaptive predistorter for power amplifiers  Open access

     Gilabert Pinal, Pere Lluis; Bertran Alberti, Eduardo; Montoro López, Gabriel; Berenguer Sau, Jordi
    North -East Workshop on Circuits and Systems/TAISA
    p. 268-271
    Presentation's date: 2009-06-28
    Presentation of work at congresses

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    Análisis comparativo de técnicas de reducción de PAPR en señales OFDM  Open access

     Lopez Caro, Alberto; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Bertran Alberti, Eduardo; Jove Casals, Jose M.
    Simposium Nacional de la Unión Científica Internacional de Radio
    Presentation's date: 2009-09-17
    Presentation of work at congresses

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    A full FPGA-based implementation of an adaptive digital predistorter  Open access

     Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Bertran Alberti, Eduardo
    IEEE Topical Symposium on Power Amplifiers for Wireless Communications
    p. 1-2
    Presentation's date: 2009-01-19
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  • Multi Look-Up Table Digital Predistortion for RF Power Amplifier Linearization  Open access  awarded activity

     Gilabert Pinal, Pere Lluis
    Department of Signal Theory and Communications, Universitat Politècnica de Catalunya
    Theses

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    Aquesta Tesi Doctoral se centra en el disseny d'un nou linealitzador de Predistorsió Digital (Digital Predistortion - DPD) capaç de compensar la dinàmica i els efectes no lineals introduïts pels Amplificadors de Potència (Power Amplifiers - PAs). Un dels trets més rellevants d'aquest nou predistorsionador digital i adaptatiu consisteix en ser deduïble a partir d'un model de PA anomenat Nonlinear Auto-Regressive Moving Average (NARMA). A més, la seva arquitectura multi-LUT (multi-Taula) permet la implementació en un dispositiu Field Programmable Gate Array (FPGA).La funció de predistorsió es realitza en banda base, per tant, és independent de la banda freqüencial on es durà a terme l'amplificació del senyal de RF, el que pot resultar útil si tenim en compte escenaris multibanda o reconfigurables. D'altra banda, el fet que aquest DPD tingui en compte els efectes de memòria introduïts pel PA, representa una clara millora de les prestacions aconseguides per un simple DPD sense memòria. En comparació amb d'altres DPDs basats en models més computacionalment complexos, com és el cas de les xarxes neuronals amb memòria (Time-Delayed Neural Networks - TDNN), la estructura recursiva del DPD proposat permet reduir el nombre de LUTs necessàries per compensar els efectes de memòria del PA. A més, la seva estructura multi-LUT permet l'escalabilitat, és a dir, activar or desactivar les LUTs que formen el DPD en funció de la dinàmica que presenti el PA.En una primera aproximació al disseny del DPD, és necessari identificar el model NARMA del PA. Un dels majors avantatges que presenta el model NARMA és la seva capacitat per trobar un compromís entre la fidelitat en l'estimació del PA i la complexitat computacional introduïda. Per reforçar aquest compromís, l' ús d'algoritmes heurístics de cerca, com són el Simulated Annealing o els Genetic Algorithms, s'utilitzen per trobar els retards que millor caracteritzen la memòria del PA i per tant, permeten la reducció del nombre de coeficients necessaris per caracteritzar-la. Tot i així, la naturalesa recursiva del model NARMA comporta que, de cara a garantir l'estabilitat final del DPD, cal dur a terme un estudi previ sobre l'estabilitat del model.Una vegada s'ha obtingut el model NARMA del PA i s'ha verificat l'estabilitat d'aquest, es procedeix a l'obtenció de la funció de predistorsió a través del mètode d'identificació predictiu. Aquest mètode es basa en la continua identificació del model NARMA del PA i posteriorment, a partir del model obtingut, es força al PA perquè es comporti de manera lineal. Per poder implementar la funció de predistorsió en la FPGA, cal primer expressar-la en forma de combinacions en paral·lel i cascada de les anomenades Cel·les Bàsiques de Predistorsió (BPCs), que són les unitats fonamentals que composen el DPD. Una BPC està formada per un multiplicador complex, un port RAM dual que actua com a LUT (taula de registres) i un calculador d'adreces. Les LUTs s'omplen tenint en compte una distribució uniforme dels continguts i l'indexat d'aquestes es duu a terme mitjançant el mòdul de l'envoltant del senyal. Finalment, l'adaptació del DPD consisteix en monitoritzar els senyals d'entrada i sortida del PA i anar duent a terme actualitzacions periòdiques del contingut de les LUTs que formen les BPCs. El procés d'adaptació del contingut de les LUTs es pot dur a terme en la mateixa FPGA encarregada de fer la funció de predistorsió, o de manera alternativa, pot ser duta a terme per un dispositiu extern (com per exemple un DSP - Digital Signal Processor) en una escala de temps més relaxada. Per validar l'exposició teòrica i provar el bon funcionalment del DPD proposat en aquesta Tesi, es proporcionen resultats tant de simulació com experimentals que reflecteixen els objectius assolits en la linealització del PA. A més, certes qüestions derivades de la implementació pràctica, tals com el consum de potència o la eficiència del PA, són també tractades amb detall.

    This Ph.D. thesis addresses the design of a new Digital Predistortion (DPD) linearizer capable to compensate the unwanted nonlinear and dynamic behavior of power amplifiers (PAs). The distinctive characteristic of this new adaptive DPD is its deduction from a Nonlinear Auto Regressive Moving Average (NARMA) PA behavioral model and its particular multi look-up table (LUT) architecture that allows its implementation in a Field Programmable Gate Array (FPGA) device.The DPD linearizer presented in this thesis operates at baseband, thus becoming independent on the final RF frequency band and making it suitable for multiband or reconfigurable scenarios. Moreover, the proposed DPD takes into account PA memory effects compensation which representsan step forward in overcoming classical limitations of memoryless predistorters. Compared to more computational complex DPDs with dynamic compensation, such Time-Delayed Neural Networks (TDNN), this new DPD takes advantage of the recursive nature of the NARMA structure to relax the number of LUTs required to compensate memory effects in PAs. Furthermore, its parallel multi-LUT architecture is scalable, that is, permits enabling or disabling the contribution of specific LUTs depending on the dynamics presented by a particular PA.In a first approach, it is necessary to identify a NARMA PA behavioral model. The extraction of PA behavioral models for DPD linearization purposes is carried out by means of input and output complex envelope signal observations. One of the major advantages of the NARMA structure regards its capacity to deal with the existing trade-off between computational complexity and accuracy in PA behavioral modeling. To reinforce this compromise, heuristic search algorithms such the Simulated Annealing or Genetic Algorithms are utilized to find the best sparse delays that permit accurately reproducing the PA nonlinear dynamic behavior. However, due to the recursive nature of the NARMA model, an stability test becomes a previous requisite before advancing towards DPD linearization.Once the PA model is identified and its stability verified, the DPD function is extracted applying a predictive predistortion method. This identification method relies just on the PA NARMA model and consists in adaptively forcing the PA to behave as a linear device. Focusing in the DPD implementation, it is possible to map the predistortion function in a FPGA, but to fulfill this objective it is first necessary to express the predistortion function as a combined set of LUTs.In order to store the DPD function into a FPGA, it has to be stated in terms of parallel and cascade Basic Predistortion Cells (BPCs), which are the fundamental building blocks of the NARMA based DPD. A BPC is formed by a complex multiplier, a dual port RAM memory block acting as LUT and an address calculator. The LUT contents are filled following an uniform spacing procedure and its indexing is performed with the amplitude (modulus) of the signal's envelope.Finally, the DPD adaptation consists in monitoring the input-output data and performing frequent updates of the LUT contents that conform the BPCs. This adaptation process can be carried out in the same FPGA in charge of performing the DPD function, or alternatively can be performed by an external device (i.e. a DSP device) in a different time-scale than real-time operation.To support all the theoretical design and to prove the linearization performance achieved by this new DPD, simulation and experimental results are provided. Moreover, some issues derived from practical experimentation, such as power consumption and efficiency, are also reported and discussed within this thesis.

  • On modeling of nonlinear distortion in OFDM transmitter systems

     Gilabert Pinal, Pere Lluis
    Asia Pacific Microwave Conference 2008
    Presentation's date: 2008-12-16
    Presentation of work at congresses

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  • Multi-lookup table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects

     Gilabert Pinal, Pere Lluis; Cesari, A; Montoro López, Gabriel; Bertran Alberti, Eduardo; Dilhac, J M
    IEEE transactions on microwave theory and techniques
    Vol. 56, num. 2, p. 372-384
    DOI: 10.1109/TMTT.2007.913369
    Date of publication: 2008-02
    Journal article

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  • Overview of Power Amplifier Linearization Based on Predistortion Techniques

     Bertran Alberti, Eduardo; Gilabert Pinal, Pere Lluis; Montoro López, Gabriel; Berenguer Sau, Jordi
    8th WSEAS CONFERENCE (Simulation, Modelling and Identification)
    p. 309-314
    Presentation of work at congresses

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  • On modeling of nonlinear distortion in ofdm transmitter systems

     O'Droma, M; Lei, Y; Bertran Alberti, Eduardo; Gilabert Pinal, Pere Lluis
    Asia Pacific Microwave Conference 2008
    p. 1-4
    Presentation of work at congresses

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