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  • Thread assignment of multithreaded network applications in multicore/multithreaded processors

     Radojkovic, Petar; Cakarevic, Vladimir; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    IEEE transactions on parallel and distributed systems
    Vol. 24, num. 12, p. 2513-2525
    DOI: 10.1109/TPDS.2012.311
    Date of publication: 2013-12
    Journal article
  • The problem of evaluating CPU-GPU systems with 3d visualization applications

     Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Valero Cortes, Mateo
    IEEE micro
    Vol. 32, num. 6, p. 17-27
    DOI: 10.1109/MM.2012.13
    Date of publication: 2012-12
    Journal article
    Image
  • Procedimiento, sistema y pieza de código ejecutable para controlar el uso de recursos de hardware de un sistema informático

     Pajuelo González, Manuel Alejandro; Verdu Mula, Javier
    Date of request: 2012-04-16
    Invention patent
  • Procedimiento, sistema y pieza de código ejecutable para virtualizar un recurso de hardware asociado a un sistema informático

     Pajuelo González, Manuel Alejandro; Verdu Mula, Javier
    Date of request: 2012-04-16
    Invention patent
  • Concurs Wayra Barcelona 2012

     Arroyo, Ignacio; Pajuelo González, Manuel Alejandro; Verdu Mula, Javier
    Award or recognition
  • Optimal task assignment in multithreaded processors: a statistical approach

     Cakarevic, Vladimir; Radojkovic, Petar; Moreto Planas, Miquel; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Cazorla, Francisco J.; Nemirovsky, Mario; Valero Cortes, Mateo
    International Conference on Architectural Support for Programming Languages and Operating Systems
    p. 235-248
    DOI: 10.1145/2150976.2151002
    Presentation's date: 2012
    Presentation of work at congresses
  • An abstraction methodology for the evaluation of multi-core multi-threaded architectures

     Zilan, Ruken; Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Milito, Rodolfo; Valero Cortes, Mateo
    IEEE International Symposium on Modelling, Analysis and Simulation of Computer and Telecommunication Systems
    p. 478-481
    DOI: 10.1109/MASCOTS.2011.11
    Presentation's date: 2011-07-25
    Presentation of work at congresses
    Image
  • Thread to strand binding of parallel network applications in massive multi-threaded systems

     Radojkovic, Petar; Cakarevic, Vladimir; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Cazorla, Francisco J.; Nemirovsky, Mario; Valero Cortes, Mateo
    ACM SIGPLAN notices
    Vol. 45, num. 5, p. 191-201
    Date of publication: 2010-05
    Journal article
    Image
  • Thread to strand binding of parallel network applications in massive multi-threaded systems

     Radojkovic, Petar; Cakarevic, Vladimir; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    International Conference on Supercomputing
    p. 191-201
    Presentation's date: 2010-01
    Presentation of work at congresses
    Image
  • Characterizing the resource-sharing levels of the UltraSparc T2 processor

     Cakarevic, Vladimir; Radojkovic, Petar; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Cazorla, Francisco J.; Nemirovsky, Mario; Valero Cortes, Mateo
    Annual IEEE/ACM International Symposium on Microarchitecture
    p. 1-12
    DOI: /doi.acm.org/10.1145/1669112.1669173
    Presentation's date: 2009-12
    Presentation of work at congresses
    Image
  • ARQUITECTURA DE COMPUTADORS D'ALTRES PRESTACIONS (CAP)

     Jimenez Castells, Marta; Pericas Gleim, Miquel; Navarro Guerrero, Juan Jose; Llaberia Griño, Jose M.; Llosa Espuny, Jose Francisco; Villavieja Prados, Carlos; Alvarez Martinez, Carlos; Jimenez Gonzalez, Daniel; Ramirez Bellido, Alejandro; Morancho Llena, Enrique; Fernandez Jimenez, Agustin; Pajuelo González, Manuel Alejandro; Olive Duran, Angel; Sanchez Carracedo, Fermin; Moreto Planas, Miquel; Verdu Mula, Javier; Abella Ferrer, Jaume; Valero Cortes, Mateo
    Competitive project
  • Mapa Conceptual Global como herramienta para la vision global de un sistema operativo  Open access

     Verdu Mula, Javier; Lopez Alvarez, David; Pajuelo González, Manuel Alejandro
    Jornadas de Enseñanza Universitaria de la Informática
    p. 1-8
    Presentation's date: 2009-07
    Presentation of work at congresses
    Access to the full text
  • Internet traffic and the behavior of processing workloads  Open access

     Zilan, Ruken; Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Valero Cortes, Mateo
    International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems
    p. 269-272
    Presentation's date: 2009-07
    Presentation of work at congresses
    Access to the full text
  • Measuring operating system overhead on Sun UltraSparc T1 processor  Open access

     Radojkovic, Petar; Cakarevic, Vladimir; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Gioiosa, Roberto; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems
    Presentation's date: 2009-07
    Presentation of work at congresses
    Access to the full text
  • Experiencias en el uso de un mapa conceptual global en SO

     Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Lopez Alvarez, David
    Jornades de Docència del Departament d'Arquitectura de Computadors
    p. 1-22
    Presentation's date: 2009-02-13
    Presentation of work at congresses
  • Multiplayer processing - an execution model for parallel stateful packet processing

     Verdu Mula, Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    ACM/IEEE Symposium on Architectures for Networking and Communications Systems
    p. 79-88
    Presentation's date: 2008-11
    Presentation of work at congresses
  • Measuring operating system overhead on CMT processors  Open access

     Radojkovic, Petar; Cakarevic, Vladimir; Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Gioiosa, Roberto; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    Symposium on Computer Architecture and High Performance Computing
    p. 133-140
    Presentation's date: 2008-10-29
    Presentation of work at congresses
    Access to the full text
  • MultiLayer Processing: an execution model for parallel stateful packet processing

     Verdu Mula, Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    ACM/IEEE Symposium on Architectures for Networking and Communications Systems
    p. 79-88
    DOI: 10.1145/1477942.1477954
    Presentation's date: 2008-09
    Presentation of work at congresses
  • Analysis and Architectural Support for Parallel Stateful Packet Processing  Open access

     Verdu Mula, Javier
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Sistemes Operatius. Quadern de Laboratori

     Pajuelo González, Manuel Alejandro; Lopez Alvarez, David; Millan Vizuete, Amador; Heredero Lazaro, Ana M.; Durán, Alex; Herrero Zaragoza, José Ramón; Verdu Mula, Javier; Becerra Fontal, Yolanda; Morancho Llena, Enrique
    Date of publication: 2008-07
    Book
  • Montando el puzzle: visión global de un sistema operativo

     Verdu Mula, Javier; Lopez Alvarez, David; Pajuelo González, Manuel Alejandro
    Jornadas de Enseñanza Universitaria de la Informática
    p. 495-502
    Presentation's date: 2008-07
    Presentation of work at congresses
  • Undertanding the overhead of the spin-lock loop in CMT architectures  Open access

     Cakarevic, Vladimir; Radojkovic, Petar; Verdu Mula, Javier; Gioiosa, Roberto; Pajuelo González, Manuel Alejandro; Cazorla Almeida, Francisco Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    Workshop on the Interaction between Operating Systems and Computer Architecture
    p. 1-10
    Presentation's date: 2008-06-18
    Presentation of work at congresses
    Access to the full text
  • Overhead of the spin-lock loop in UltraSPARC T2  Open access

     Cakarevic, Vladimir; Radojkovic, Petar; Cazorla Almeida, Francisco Javier; Gioiosa, Roberto; Nemirovsky, Mario; Valero Cortes, Mateo; Pajuelo González, Manuel Alejandro; Verdu Mula, Javier
    HiPEAC Industrial Workshop
    p. 1-2
    Presentation's date: 2008-06-04
    Presentation of work at congresses
    Access to the full text
  • Una metodología para obtener la visión global de un SO

     Verdu Mula, Javier; Pajuelo González, Manuel Alejandro; Lopez Alvarez, David
    Jornades de Docència del Departament d'Arquitectura de Computadors
    p. 1-19
    Presentation's date: 2008-02-14
    Presentation of work at congresses
  • Computación de Altas Prestaciones V: Arquitecturas, Compiladores, Sistemas Operativos, Herramientas y Aplicaciones

     Ramirez Bellido, Alejandro; Valero Cortes, Mateo; Moreto Planas, Miquel; Cazorla Almeida, Francisco Javier; Abella Ferrer, Jaume; Figueiredo Boneti, Carlos Santieri; Gioiosa, Roberto; Pajuelo González, Manuel Alejandro; Quiñones Moreno, Eduardo; Verdu Mula, Javier; Guitart Fernández, Jordi; Fernandez Jimenez, Agustin; Garcia Almiñana, Jordi; Utrera Iglesias, Gladys Miriam; Martorell Bofill, Xavier; Gil Gómez, Maria Luisa; Alvarez Martinez, Carlos; Torres Viñals, Jordi; Herrero Zaragoza, José Ramón; Morancho Llena, Enrique; Otero Calviño, Beatriz
    Competitive project
  • Parallelizing deep packet processing in highly parallel architectuers

     Verdu Mula, Javier; Nemirovsky, Mario; Valero Cortes, Mateo
    Third International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2007)
    p. 71-74
    Presentation's date: 2007-07
    Presentation of work at congresses
  • The Impact of Traffic Aggregation on the Memory Performance of Networking Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Valero Cortes, Mateo
    Journal of embedded computing
    Vol. 2, num. 1, p. 77-82
    Date of publication: 2006-10
    Journal article
  • Architectural Impact of Stateful Networking Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Valero Cortes, Mateo
    1st ACM/IEEE Symposium on Architecture for Networking and Communications Systems (ANCS-I).
    p. 11-18
    Presentation's date: 2005-10-26
    Presentation of work at congresses
  • Performance Analysis of New Packet Trace Compressiong TCP Flow Clustering

     Holanda Filho, Raimir; Verdu Mula, Javier; Garcia Vidal, Jorge; Valero Cortes, Mateo
    IEEE International Symposium on Performance Analisys of Systems and Software ISPASS
    Presentation's date: 2005-03
    Presentation of work at congresses
  • The Impact of Traffic Aggregation on the Memory Performance of Networking Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Valero Cortes, Mateo
    Computer architecture news
    Vol. 33, num. 3, p. 57-62
    Date of publication: 2005-03
    Journal article
  • Workload analyses of networking applications

     Verdu Mula, Javier; Garcia Mateos, Jorge; Nemirvsky, Mario; Valero Cortes, Mateo
    Jornadas de Paralelismo
    p. 428-434
    Presentation of work at congresses
  • Performance Analysis of a New Packet Trace Compressor based on TCP Flow Clustering

     Holanda Filho, Raimir; Verdu Mula, Javier; Garcia Vidal, Jorge; Valero Cortes, Mateo
    2005 IEEE International Symposium on Performance Analysis of Systems And Software (ISPASS'05)
    p. 219-225
    Presentation of work at congresses
  • Workload Characterization of Stateful Networking Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Valero Cortes, Mateo
    International Symposium on High Performance Computing
    p. 1
    Presentation of work at congresses
  • Analysis of traffic traces for stateful applications

     Verdu Mula, Javier
    Jornadas de Paralelismo
    Presentation's date: 2004-09-15
    Presentation of work at congresses
  • Workload Characterization of Emerging Stateful Networking Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, M; Valero Cortes, Mateo
    Date: 2004-09
    Report
  • The impact of traffic aggregation on the memory performance of networking applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, Mario; Valero Cortes, Mateo
    MEDEA Workshop MEmory performance: DEaling with Applications , systems and architecture in conjunction with PACT 2004 Conference.
    p. 59-64
    Presentation's date: 2004-09
    Presentation of work at congresses
  • Traffic Aggregation Impact on the Memory Performance of Networking Applications

     Verdu Mula, Javier
    MEDEA Workshop MEmory performance: DEaling with Applications , systems and architecture in conjunction with PACT 2004 Conference.
    Presentation's date: 2004-09-01
    Presentation of work at congresses
  • The Impact of Traffic Aggregation on the Memory Performance of Networking Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, M; Valero Cortes, Mateo
    Date: 2004-07
    Report
  • Analysis of Traffic Traces for Stateful Applications

     Verdu Mula, Javier
    Third Workshop on Network Processors & Applications (NP3) in conjunction with the Tenth International Symposium on High-Performance Computer Architecture (HPCA-10)
    Presentation's date: 2004-02-14
    Presentation of work at congresses
  • Analysis of Traffic Traces for Statefull Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, M; Valero Cortes, Mateo
    Jornadas de Paralelismo
    Presentation of work at congresses
  • Traffic Aggregation Impact on the Memory Performance of Networking Applications

     Valero Cortes, Mateo; Verdu Mula, Javier; Nemirosvky, M; Garcia Vidal, Jorge
    MEDEA Workshop MEmory performance: DEaling with Applications , systems and architecture in conjunction with PACT 2004 Conference.
    Presentation of work at congresses
  • Analysis of Traffic Traces for Stateful Applications

     Valero Cortes, Mateo; Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirowsky, M
    Third Workshop on Network Processors & Applications (NP3) in conjunction with the Tenth International Symposium on High-Performance Computer Architecture (HPCA-10)
    p. 120-124
    Presentation of work at congresses
  • Analysis of Traffic Traces for Stateful Applications

     Verdu Mula, Javier; Garcia Vidal, Jorge; Nemirovsky, M; Valero Cortes, Mateo
    Date: 2003-11
    Report
  • Retos en el Diseño de Network Processors

     Verdu Mula, Javier; Corbal San Adrian, Jesus; Garcia Vidal, Jorge; Valero Cortes, Mateo
    XIII Jornadas de Paralelismo
    p. 1-6
    Presentation of work at congresses