Carregant...
Carregant...

Vés al contingut (premeu Retorn)

An energy-efficient memory unit for clustered microarchitectures

Autor
Bieschewski, S.; Parcerisa, Joan-Manuel; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on computers
Data de publicació
2016-08-01
Volum
65
Número
8
Pàgina inicial
2631
Pàgina final
2637
DOI
https://doi.org/10.1109/TC.2015.2493518 Obrir en finestra nova
Projecte finançador
Microarquitectura y Compiladores para Futuros Procesadores III
Repositori
http://hdl.handle.net/2117/90303 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/document/7303897/?arnumber=7303897 Obrir en finestra nova
Resum
Whereas clustered microarchitectures themselves have been extensively studied, the memory units for these clustered microarchitectures have received relatively little attention. This article discusses some of the inherent challenges of clustered memory units and shows how these can be overcome. Clustered memory pipelines work well with the late allocation of load/store queue entries and physically unordered queues. Yet this approach has characteristic problems such as queue overflows and allocat...
Citació
Bieschewski, S., Parcerisa, Joan-Manuel, González, A. An energy-efficient memory unit for clustered microarchitectures. "IEEE transactions on computers", 1 Agost 2016, vol. 65, núm. 8, p. 2631-2637.
Paraules clau
Cache memories, Clustered architectures, Distributed architectures, Microprocessors, Parallel architectures, Store buffer
Grup de recerca
ARCO - Microarquitectura i Compiladors

Participants

Arxius