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WiSync: an architecture for fast synchronization through on-chip wireless communication

Autor
Abadal, S.; Albert Cabellos-Aparicio; Alarcon, E.; Torrellas, J.
Tipus d'activitat
Article en revista
Revista
ACM SIGPLAN notices
Data de publicació
2016-04-01
Volum
51
Número
4
Pàgina inicial
3
Pàgina final
17
DOI
https://doi.org/10.1145/2872362.2872396 Obrir en finestra nova
Projecte finançador
HACIA LAS COMUNICACIONES RF BASADAS EN GRAFENO DEMOSTRANDO LAS ANTENAS DE GRAFENO
Repositori
http://hdl.handle.net/2117/90954 Obrir en finestra nova
URL
http://dl.acm.org/citation.cfm?doid=2872362.2872396 Obrir en finestra nova
Resum
In shared-memory multiprocessing, fine-grain synchronization is challenging because it requires frequent communication. As technology scaling delivers larger manycore chips, such pattern is expected to remain costly to support.; In this paper, we propose to address this challenge by using on-chip wireless communication. Each core has a transceiver and an antenna to communicate with all the other cores. This environment supports very low latency global communication. Our architecture, called WiSy...
Citació
Abadal, S., Albert Cabellos-Aparicio, Alarcon, E., Torrellas, J. WiSync: an architecture for fast synchronization through on-chip wireless communication. "ACM SIGPLAN notices", 1 Abril 2016, vol. 51, núm. 4, p. 3-17.
Paraules clau
On-chip Wireless Communication, Synchronization, Massive Multicore Architectures, Barrier Synchronization, Integrated-circuits, Cmos, Multiprocessors, Noc, Interconnects, Challenges, Networks, Design
Grup de recerca
CBA - Sistemes de Comunicacions de Banda Ampla
EPIC - Disseny de circuits analògics integrats i de convertidors de potencia conmutats
PERC-UPC - Centre de Recerca d'Electrònica de Potència UPC

Participants

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