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Supply noise and impedance of on-chip power distribution networks in ICs with nonuniform power consumption and interblock decoupling capacitors

Autor
Rius, J.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on very large scale integration (VLSI) systems
Data de publicació
2015-06-01
Volum
23
Pàgina inicial
993
Pàgina final
1004
DOI
https://doi.org/10.1109/TVLSI.2014.2332189 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/document/6851921/ Obrir en finestra nova
Resum
An RLC model for on-chip power distribution networks (PDN) is presented for array and wire-bonded integrated circuits including interblock decoupling capacitors and C4 impedances. From the model, the supply noise produced by switching blocks as well as the impedance to ac ground as seen from any point of the circuit are calculated as a function of frequency and PDN parameters. The proposed method to perform such calculation allows optimizing relevant PDN design parameters, such as number, size, ...
Paraules clau
Integrated circuit (IC) modeling, power distribution networks (PDNs), power supply noise (PSN).
Grup de recerca
QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat

Participants