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GAMC: A generic analyzable memory controller for hard real-time multicore processors

Autor
Paolieri, M.; Quiñones, E.; Cazorla, F. J.; Valero, M.
Tipus d'activitat
Document cientificotècnic
Data
2009
Codi
UPC-DAC-RR-CAP-2009-26
Resum
Multicore (CMP) processors represent a good solution to provide the performance required by hard real-time systems. However, it is difû01cult to provide a tight WCET estimation for CMPs due to interferences that threads suffer when accessing shared hardware resources. Several proposals already deal with interferences caused by on-chip resources such as caches or internal bus. Although some previous proposals deal with interferences in the memory controller, no generic solution has been proposed...
Paraules clau
Hard Real-time, Memory Controller, Sdram, Wcet Analysis
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions

Participants

  • Paolieri, Marco  (autor)
  • Quiñones Moreno, Eduardo  (autor)
  • Cazorla Almeida, Francisco Javier  (autor)
  • Valero Cortes, Mateo  (autor)