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A fine grain queueing model for multi–core multi–threaded architectures

Autor
Zilan, R.; Verdu, J.; Garcia, J.; Milito, R.; Nemirovsky, M.; Valero, M.
Tipus d'activitat
Document cientificotècnic
Data
2010
Codi
UPC-DAC-RR-CAP-2010-11
Resum
Multi-core multi-threaded architectures are increasing the amount of hardware resources on chips to exploit the performance of systems with large number of parallel running threads. The resources are hierarchically distributed in the processor to reduce sources of contention among threads that share a particular hardware unit. This design advance also leads to new challenges in the system performance analysis, since the cost of simulation-based experiments exponentially scales with the complexit...
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions
CNDS - Xarxes de Computadors i Sistemes Distribuïts
VIRTUOS - Virtualisation and Operating Systems

Participants