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Energy-efficient register caching with compiler assistance

Autor
Jones, T.; O'Boyle, M.; Abella, J.; Gonzalez, A.; Ergin, O.
Tipus d'activitat
Article en revista
Revista
ACM transactions on architecture and code optimization
Data de publicació
2009-10
Volum
6
Número
4
Pàgina inicial
1
Pàgina final
23
DOI
https://doi.org/10.1145/1596510.1596511 Obrir en finestra nova
URL
http://dl.acm.org/citation.cfm?id=1596511 Obrir en finestra nova
Resum
The register file is a critical component in a modern superscalar processor. It must be large enough to accommodate the results of all in-flight instructions. It must also have enough ports to allow simultaneous issue and writeback of many values each cycle. However, this makes it one of the most energy-consuming structures within the processor with a high access latency. As technology scales, there comes a point where register accesses are the bottleneck to performance and so must be pipelined ...
Paraules clau
Compiler, Energy efficiency, Experimentation, Low-power design, Measurement, Microarchitecture, Performance, Register cache, Register file
Grup de recerca
ARCO - Microarquitectura i Compiladors

Participants

  • Jones, Timothy M.  (autor)
  • O'Boyle, Michael F. P.  (autor)
  • Abella Ferrer, Jaume  (autor)
  • Gonzalez Colas, Antonio Maria  (autor)
  • Ergin, Oguz  (autor)