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Reducing soft errors through operand width aware policies

Autor
Ergin, O.; Unsal, O.; Vera, F.J.; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on dependable and secure computing
Data de publicació
2009-09
Volum
6
Número
3
Pàgina inicial
217
Pàgina final
230
DOI
https://doi.org/10.1109/TDSC.2008.18 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/7881 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/document/4479489/ Obrir en finestra nova
Resum
Soft errors are an important challenge in contemporary microprocessors. Particle hits on the components of a processor are expected to create an increasing number of transient errors with each new microprocessor generation. In this paper, we propose simple mechanisms that effectively reduce the vulnerability to soft errors in a processor. Our designs are generally motivated by the fact that many of the produced and consumed values in the processors are narrow and their upper order bits are mean...
Citació
Ergin, O. [et al.]. Reducing soft errors through operand width aware policies. "IEEE transactions on dependable and secure computing", Setembre 2009, vol. 6, núm. 3, p. 217-230.
Paraules clau
Error correction, Error detection, Microprocessor chips, Reliability, Storage management chips
Grup de recerca
ARCO - Microarquitectura i Compiladors

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