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IEEE transactions on computer-aided design of integrated circuits and systems

Total activitats: 22
Títol addicional
IEEE Xplore
ISSN
0278-0070 Obrir en finestra nova
Publicació / Producció
New York, NY : Antennas and Propagation Society of the Institute of Electrical and Electronics Engineers, 1988-
URL
http://ieeexplore.ieee.org/servlet/opac?punumber=43 Obrir en finestra nova

Producció científica

1 a 22 de 22 resultats
 
  • Efficient production binning using octree tessellation in the alternate measurements space  Accés obert

     Álvaro Gómez-Pau; Balado, L.; Figueras, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 35, num. 8, p. 1386-1395
    DOI: 10.1109/TCAD.2015.2501309
    Data de publicació: 2016-08-01
    Article en revista
    Accés al text complet
  • A boolean rule-based approach for manufacturability-aware cell routing  Accés obert

     Cortadella, J.; Petit, J.; Gomez, S.; Moll, F.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 33, num. 3, p. 409-422
    DOI: 10.1109/TCAD.2013.2292514
    Data de publicació: 2014-03-01
    Article en revista
    Accés al text complet
  • Area-optimal transistor folding for 1-D gridded cell design  Accés obert

     Cortadella, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 32, num. 11, p. 1708-1721
    DOI: 10.1109/TCAD.2013.2269680
    Data de publicació: 2013-11
    Article en revista
    Accés al text complet
  • Diagnosis of interconnect full open defects in the presence of gate leakage currents

     Arumi, D.; Rodriguez-Montanes, R.; Figueras, J.; Eichenberger, S.; Hora, C.; Kruseman, B.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 32, num. 2, p. 301-312
    DOI: 10.1109/TCAD.2012.2228269
    Data de publicació: 2013-02
    Article en revista
  • Architectural exploration of large-scale hierarchical chip multiprocessors

     Nikitin, N.; San Pedro, J. de; Cortadella, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 32, num. 10, p. 1569-1582
    DOI: 10.1109/TCAD.2013.2272539
    Data de publicació: 2013
    Article en revista
  • Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out

     Arumi, D.; Rodriguez-Montanes, R.; Figueras, J.; Eichenberger, S.; Hora, C.; Kruseman, B.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 30, num. 12, p. 1911-1922
    DOI: 10.1109/TCAD.2011.2165071
    Data de publicació: 2011-12
    Article en revista
  • Elastic Circuits

     Carmona, J.; Cortadella, J.; Kishinevsky, M.; Taubin, A.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 28, num. 10, p. 1427-1455
    DOI: 10.1109/TCAD.2009.2030436
    Data de publicació: 2009-10
    Article en revista
  • Compressed block-decomposition algorithm for fast capacitance extraction

     Heldring, A.; Rius, J.; Parron, J.; Tamayo, J.M.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 27, num. 2, p. 265-271
    DOI: 10.1109/TCAD.2007.907236
    Data de publicació: 2008-02
    Article en revista
  • Experimental characterization of CMOS interconnect open defects

     Arumi, D.; Rodriguez-Montanes, R.; Figueras, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 27, num. 1, p. 123-136
    DOI: 10.1109/TCAD.2007.907255
    Data de publicació: 2008-01
    Article en revista
  • Encoding Large Asynchronous Controllers With ILP Techniques

     Carmona, J.; Cortadella, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 27, num. 1, p. 20-33
    DOI: 10.1109/TCAD.2007.907238
    Data de publicació: 2008-01
    Article en revista
  • Minimizing Test Time in Arithmetic Test-Pattern Generators With Constrained Memory Resources

     Manich, S.; García, L.; Figueras, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 26, num. 11, p. 2046-2058
    Data de publicació: 2007-11
    Article en revista
  • Desynchronization: Synthesis of asynchronous circuits from synchronous specifications

     Cortadella, J.; Kondratyev, A.; Sotiriou, C.; Lavagno, L.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 25, num. 10, p. 1904-1921
    Data de publicació: 2006-10
    Article en revista
  • Synthesis of asynchronous controllers using integer linear programming

     Carmona, J.; Colom, J.; Cortadella, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 25, num. 9, p. 1637-1651
    Data de publicació: 2006-09
    Article en revista
  • Quasi-Static Scheduling of Independent Tasks for Reactive Systems

     Cortadella, J.; Kondratyev, A.; Lavagno, L.; Passerone, C.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 24, num. 10, p. 1492-1514
    Data de publicació: 2005-10
    Article en revista
  • Timing-driven logic bi-decomposition

     Cortadella, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 22, num. 6, p. 675-685
    Data de publicació: 2003-06
    Article en revista
  • Lazy transition systems and asynchronous circuits synthesis with relative timing assumptions

     Cortadella, J.; Kishinevsky, M.; Steve, M.; Kondratyev, A.; Lavagno, L.; Stevens, K.; Taubin, A.; Yakovlev, A.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 21, num. 2, p. 109-130
    Data de publicació: 2002-02
    Article en revista
  • Decomposition and Technology Mapping of Speed-Independent Circuits Using Boolean Relations

     Cortadella, J.; Kishinevsky, M.; Kondratyev, A.; Lavagno, L.; Pastor, E.; Yakovlev, A.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 18, num. 9, p. 1221-1236
    Data de publicació: 2000-09
    Article en revista
  • Structural Methods for the Synthesis of Speed-Independent Circuits

     Pastor, E.; Cortadella, J.; Kondratyev, A.; Roig, O.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 17, num. 11, p. 1108-1129
    Data de publicació: 1998-11
    Article en revista
  • A Region-Based Theory for State Assignment in Speed-Independent Circuits

     Cortadella, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 16, num. 8, p. 793-812
    Data de publicació: 1997-08
    Article en revista
  • Current testability analysis of feedback bridging faults in cmos

     Miquel, R.; Rubio, A.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 14, num. 10, p. 1299-1305
    Data de publicació: 1995-10
    Article en revista
  • Electrical model of the floating gate defect in cmos ic's: implications on iddq testing

     Champac, V.; Rubio, A.; Figueras, J.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 13, num. 3, p. 359-369
    Data de publicació: 1994-03
    Article en revista
  • An approach to the analysys and detection of crosstalk faults in digital vlsi circuits

     Rubio, A.; Itazaki, A.; Xu, X.; Kinoshita, K.
    IEEE transactions on computer-aided design of integrated circuits and systems
    Vol. 13, num. 3, p. 387-395
    Data de publicació: 1994-03
    Article en revista