This Mixed Signal Letter presents a proposal of four-quadrant linear-assisted DC/DC voltage regulator. In this topology, a class-AB linear voltage amplifier assists a four-quadrant switching DC/DC converter in order to obtain a compact circuit with advantages of both alternatives; i.e., high efficiency, inherent in switching converters, and low output ripple and fast reaction to the load changes that are characteristics of linear regulators. In order to reduce the power dissipation in the linear regulator, it is considered as an assisting circuit for providing just a small fraction of the total load current. Furthermore, this stage provides the required clock signal for the switching counterpart, obtaining a compact topology thanks to the reduction of the complexity in the design of the control scheme for the switching converter. In fact, the proposed topology can be addressed to on-chip practical implementations, since no output capacitors are required. This last advantage provides the possibility of obtaining good-performance power-supply modulators for envelope tracking techniques in power amplifiers. The implementation and results indicate that the proposed four-quadrant linear-assisted DC/DC regulator can achieve a notably compacting and higher performance, while consuming less power in comparison to linear alternatives.
Dominguez, M.; Gorreta, S.; Pons, J.; Blokhina, E.; Giounanlis, P.; Feely, O. Analog integrated circuits and signal processing Vol. 82, num. 3, p. 559-569 DOI: 10.1007/s10470-014-0458-y Data de publicació: 2015-03-01 Article en revista
This paper presents a new method to characterize the dynamics of the charge trapped in the dielectric layer of contactless microelectromechanical systems. For sampled-time systems, this allows knowing the state of the net charge at each sampling time without distorting the measurement. This approach allows one to model the expected behaviour of dielectric charging as a response to a sigma-delta control of charge. The goodness of the proposed approach is obtained by matching the experimentally obtained closed loop response with the one predicted using the proposed characterization method. The characterization method also provides a criterion to avoid nonlinear effects, such as fractal-like behaviour, in charge control.
The present article is related to the recently published paper given in (Abuelma’atti and Khalifa, Analog Integr Circuits Signal Process, 73:989–992, 2012), which depicts the possible relation between the modified Wien-bridge circuit used by the authors of references (Singh, Analog Integr Circuits Signal Process 48:251–255, 2006; Singh, Analog Integr Circuits Signal Process, 50:127–132, 2007; Singh, Analog Integr Circuits Signal Process, 62:327–332, 2010; Wangenheim, Analog Integr
Circuits Signal Process, 66:139–141, 2011; Martinez-Garcia et al., Analog Integr Circuits Signal Process, 70:443–449, 2012), and the comparator-based relaxation oscillator. In particular, in the referenced Mixed Signal Letter (Abuelma’atti and Khalifa, Analog Integr Circuits
Signal Process, 73:989–992, 2012), the authors assert that the modified Wien-bridge oscillator circuit under discussion, used previously in the aforementioned referenced articles, can behave as a sinusoidal oscillator only at relatively high frequencies when the operational amplifier can be considered non-ideal. In addition, at relatively low frequencies, when the operational amplifier can be considered ideal, the same circuit would behave as a relaxation oscillator with a square wave output rather than a sinusoidal output. However, this paper reveals that this assertion is not strictly correct, because in both cases (in low and high frequencies), the generated waveform at the circuit output is a sinusoidal signal, with the possibility of be cut out, depending on proper circuit dimensioning (according to the oscillation criterion) as well as the oscillation frequency and the properties of the amplifier (slew rate, and
In this paper we present an asynchronous finite-state machine digital controller co-integrated with an on-chip non-inverting buck-boost power converter with dynamic signal-tracking capabilities. The mostly-digital controller functionally implements a non-PWM zone-wise control law through asynchronous circuitry, thus exhibiting self-timed minimum latency and ultra low power operation due to gate switching activity. Experimental results on a 0.35 µm CMOS technology demonstrate an efficiency up to 80 % with a switching frequency of 2.86 MHz.
In this paper we present an asynchronous finite-state machine digital controller co-integrated with an on-chip non-inverting buck-boost power converter with dynamic signal-tracking capabilities. The mostly-digital controller functionally implements a non-PWM zone-wise control law through asynchronous circuitry, thus exhibiting
self-timed minimum latency and ultra low power operation due to gate switching activity. Experimental results on a
0.35 lm CMOS technology demonstrate an efficiency up to 80 % with a switching frequency of 2.86 MHz
Gómez, I.; Gilabert, Pere L.; Montoro, G.; Gelonch, A.J.; Marojevic, V. Analog integrated circuits and signal processing Vol. 73, num. 2, p. 473-482 DOI: 10.1007/s10470-012-9963-z Data de publicació: 2012-09-19 Article en revista
This paper analyzes the computing resource
management implications of SDR base stations implemented
as SDR clouds. SDR clouds describe distributed
antennas that connect to a data center for digital signal
processing. The data center employs cloud computing
technology, providing a virtualized computing resource
pool. The service area of a single SDR cloud may be a
metropolitan area with a high user density. Hence, the data
center will execute thousands of SDR applications in parallel,
providing wireless communications services to several
radio cells. Whenever a user initiates or terminates a
wireless communications session, computing resources
need to be allocated or deallocated in real time. We
therefore propose a hierarchical resource management.
This paper justifies such an approach and analyzes different
resource management strategies. The results indicate the
need for strategies that can dynamically adapt to the given
user traffic distribution.
Martinez, H.; Grau, A.; Bolea, Y.; Gamiz, J. Analog integrated circuits and signal processing Vol. 70, num. 3, p. 443-449 DOI: 10.1007/s10470-011-9730-6 Data de publicació: 2012-03-01 Article en revista
The present article is related to the recently published paper given in Singh (Analog Integr Circuits Signal Process, 62, 327–332, 2010), which depicts the failure of Barkhausen criterion concerning the determination of condition of oscillation for startup of sinusoidal oscillation. In particular, the sinusoidal oscillator circuit considered in this article is one of the possible four alternatives of the Wien-bridge oscillator (WBO). In other previous articles by the same forementioned author (Singh, Analog Integr Circuits Signal Process 48, 251–255, 2006; Singh, Analog Integr Circuits Signal Process 50, 127–132, 2007), some examples are provided with the objective of sustaining this hypothesis. In this article, however, the study of RC oscillator circuits based on the Barkhausen criterion is reconsidered. This point of view involves to consider the classical structure of a sinusoidal oscillator as a system consisting of a positive feedback loop composed of a general amplifier block (with its corresponding local negative feedback that stabilizes the gain) plus a general passive network. Taking into account this point of view, it is shown that Barkhausen criterion (specifically, the practical form of this criterion) allows to
predict properly the startup of oscillations of the circuit considered in the article (Singh 2010).
Software-defined radio (SDR) permits dynamic switches of the employed radio access technology (RAT), over-the-air (OTA) software updates, software and hardware reuse. This extended flexibility comes at the price of a higher computing complexity and, in particular, the energy consumption at the receiver. The analysis of the computational profile of signal processing algorithms is of great importance in SDR for understanding the implication on the energy consumption. Several signal processing algorithms show a different profile as a function of the signal quality perceived at the receiver antenna. Therefore, power control policies have an implication on the computational performance of SDR receivers. Understanding the behaviour of these algorithms allows trading transmitted power against receiver energy consumption. This paper presents a model for characterizing the computational profile of Turbo and LDPC decoders and demonstrates is applicability in existing power control strategies.
Fernandez, D.; Madrenas, J.; Dominguez, M.; Pons, J.; Ricart, J. Analog integrated circuits and signal processing Vol. 57, num. 3, p. 225-232 DOI: 10.1007/s10470-008-9166-9 Data de publicació: 2008-12 Article en revista
In this paper we present an electronic circuit for position or capacitance estimation of MEMS electrostatic actuators based on a switched capacitor technique. The circuit uses a capacitive divider configuration composed by a fixed capacitor and the variable capacitance of the electrostatic actuator for generating an output signal that is a function of the input voltage and capacitive ratio. The proposed circuit can be used to simultaneously actuate and sense position of an electrostatic MEMS actuator without extra sensing elements. This approach is compatible with the requirements of most analog feedback systems and the circuit topology of pulsed digital oscillators.
Dominguez, M.; Pons, J.; Ricart, J.; Juillard, J.; Colinet, E. Analog integrated circuits and signal processing Vol. 53, num. 2-3, p. 145-152 DOI: 10.1007/s10470-006-9015-7 Data de publicació: 2007-12 Article en revista
The objective of this work is to extend the linear analysis of Pulsed Digital Oscillators to those topologies having a Finite Impulse Response (FIR) in the feedback loop of the circuit. It will be shown with two specific examples how the overall response of the oscillator can be adjusted to some point by changing the feedback filter, when the resonator presents heavy damping losses. Extensive discrete-time simulations and experimental results obtained with a MEMS cantilever with thermoelectric actuation and piezoresistive position sensing are presented. It will be experimentally shown that the performance of the oscillator is good even below the Nyquist limit.
Villar, G.; Alarcon, E.; Vidal, E.; Cosp, J.; Madrenas, J. Analog integrated circuits and signal processing Vol. 42, num. 2, p. 179-183 DOI: 10.1007/s10470-005-5752-2 Data de publicació: 2005-01 Article en revista
This letter describes the design and implementation of a synchronizable compact CMOS oscillator. By using a fully differential topology, a reduction in area occupancy together with an improved robustness in front of on-chip interferences is achieved. Post-layout simulation results and experimental results for a standard CMOS 0.35 µ m technology are presented to validate the functionality of the tunable oscillator.