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Fetch engine design decisions for DSS workloads

Autor
Navarro, C.; Alex Ramirez; Larriba, J.; Valero, M.
Tipus d'activitat
Document cientificotècnic
Data
2000-02
Codi
UPC-DAC-2000-9
Resum
This report examines the behavior of current and next generation microprocessors' fetch engines and which parameters of its design are key to overall performance while running DSS workloads. Main fetch engine design decisions are re-evaluated in the context of DSS workloads, and several tradeoffs between them are discussed. In particular, we analyze the effect of the three major aspects that characterize fetch performance, the latency of instructions being fetched, their quality and the number o...
Paraules clau
Code reordering, Databases, Fetch engine, Instruction cache, branch prediction
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions
DAMA-UPC - Data Management Group

Participants