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Energy efficiency via thread fusion and value reuse

Autor
Rakvic, R.N.; González, J.; Cai, Q.; Chaparro, P.; Magklis, G.; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
IET computers and digital techniques
Data de publicació
2010-03-04
Volum
4
Número
2
Pàgina inicial
114
Pàgina final
125
DOI
https://doi.org/10.1049/iet-cdt.2009.0040 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=5424203 Obrir en finestra nova
Resum
Energy consumption has become the dominant metric when it comes to designing high-performance simultaneous multi-threaded (SMT) microprocessors. The authors propose a fusion of threads to help reduce energy consumption for these future SMT microprocessors. Threads are fused by merging two dynamic instances of the same static instruction into a single instruction thereby reducing unnecessary redundant computation in the front-end of the processor. The result is that power consumption is reduced i...
Paraules clau
Microprocessor chips, System-on-chip
Grup de recerca
ARCO - Microarquitectura i Compiladors

Participants

  • Rakvic, Ryan N.  (autor)
  • González, José  (autor)
  • Cai, Qiong  (autor)
  • Chaparro, Pedro  (autor)
  • Magklis, Grigorios  (autor)
  • Gonzalez Colas, Antonio Maria  (autor)