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Hardware-software co-design of an iris recognition algorithm

Autor
Lopez, M.; Daugman, J.; Cantó, E.
Tipus d'activitat
Article en revista
Revista
IET information security
Data de publicació
2011-04-07
Volum
5
Número
1
Pàgina inicial
60
Pàgina final
68
DOI
https://doi.org/10.1049/iet-ifs.2009.0267 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/13171 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5746574 Obrir en finestra nova
Resum
This paper describes the implementation of an iris recognition algorithm based on hardware-software co-design. The system architecture consists of a general-purpose 32- bit microprocessor and several slave coprocessors that accelerate the most intensive calculations. The whole iris recognition algorithm has been implemented on a low-cost Spartan 3 FPGA, achieving significant reduction in execution time when compared to a conventional software-based application. Experimental results show that wit...
Grup de recerca
SARTI - Centre de Desenvolupament Tecnològic de Sistemes d'Adquisició Remota i Tractament de la Informació

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