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Implementing end-to-end register data-flow continuous self-test

Autor
Carretero, J.S.; Chaparro, P.; Abella, J.; Vera, F.J.; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on computers
Data de publicació
2011-08-01
Volum
60
Número
8
Pàgina inicial
1194
Pàgina final
1207
DOI
https://doi.org/10.1109/TC.2010.179 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/16287 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5551126 Obrir en finestra nova
Resum
While Moore's Law predicts the ability of semiconductor industry to engineer smaller and more efficient transistors and circuits, there are serious issues not contemplated in that law. One concern is the verification effort of modern computing systems, which has grown to dominate the cost of system design. On the other hand, technology scaling leads to burn-in phase out. As a result, in-the-field error rate may increase due to both actual errors and latent defects. Whereas data can be protected ...
Citació
Carretero, J. [et al.]. Implementing end-to-end register data-flow continuous self-test. "IEEE transactions on computers", 01 Agost 2011, vol. 60, núm. 8, p. 1194-1207.
Grup de recerca
ARCO - Microarquitectura i Compiladors

Participants

  • Carretero Casado, Javier Sebastian  (autor)
  • Chaparro, Pedro  (autor)
  • Abella Ferrer, Jaume  (autor)
  • Vera Rivera, Francisco Javier  (autor)
  • Gonzalez Colas, Antonio Maria  (autor)