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Power MOSFET technology roadmap toward high power density voltage regulators for next-generation computer processors

Autor
López, T.; Alarcon, E.
Tipus d'activitat
Article en revista
Revista
IEEE transactions on power electronics
Data de publicació
2012-04
Volum
27
Número
4
Pàgina inicial
2193
Pàgina final
2203
DOI
https://doi.org/10.1109/TPEL.2011.2165343 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/16468 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5986728&tag=1 Obrir en finestra nova
Resum
A synchronous buck converter based multiphase architecture is evaluated to determine whether or not the most widespread voltage regulator (VR) topology canmeet the power delivery requirements of next-generation computer processors. The applied analysis methodology relies on accurate device models for circuit simulations, where the power MOSFETs are central due to their primary relevance to power losses. The method is referred to as virtual design loop and aims at optimizing the overall system pe...
Citació
López, T.; Alarcón, E. Power MOSFET technology roadmap toward high power density voltage regulators for next-generation computer processors. "IEEE transactions on power electronics", Abril 2012, vol. 27, núm. 4, p. 2193-2203.
Grup de recerca
EPIC - Energy Processing and Integrated Circuits
PERC-UPC - Centre de Recerca d'Electrònica de Potència UPC

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