Abadal, S.; Mestres, A.; Nemirovsky, M.; Lee, H.; Gonzalez, A.; Alarcon, E.; Albert Cabellos-Aparicio IEEE transactions on parallel and distributed systems Vol. 27, num. 12, p. 3631-3645 DOI: 10.1109/TPDS.2016.2537332 Data de publicació: 2016-12-01 Article en revista
Networks-on-Chip (NoCs) are currently the paradigm of choice to interconnect the cores of a chip multiprocessor. However, conventional NoCs may not suffice to fulfill the on-chip communication requirements of processors with hundreds or thousands of cores. The main reason is that the performance of such networks drops as the number of cores grows, especially in the presence of multicast and broadcast traffic. This not only limits the scalability of current multiprocessor architectures, but also sets a performance wall that prevents the development of architectures that generate moderate-to-high levels of multicast. In this paper, a Wireless Network-on-Chip (WNoC) where all cores share a single broadband channel is presented. Such design is conceived to provide low latency and ordered delivery for multicast/broadcast traffic, in an attempt to complement a wireline NoC that will transport the rest of communication flows. To assess the feasibility of this approach, the network performance of WNoC is analyzed as a function of the system size and the channel capacity, and then compared to that of wireline NoCs with embedded multicast support. Based on this evaluation, preliminary results on the potential performance of the proposed hybrid scheme are provided, together with guidelines for the design of MAC protocols for WNoC.
In shared-memory multiprocessing, fine-grain synchronization is challenging because it requires frequent communication. As technology scaling delivers larger manycore chips, such pattern is expected to remain costly to support.; In this paper, we propose to address this challenge by using on-chip wireless communication. Each core has a transceiver and an antenna to communicate with all the other cores. This environment supports very low latency global communication. Our architecture, called WiSync, uses a per-core Broadcast Memory (BM). When a core writes to its BM, all the other 100+ BMs get updated in less than 10 processor cycles. We also use a second wireless channel with cheaper transfers to execute barriers efficiently. WiSync supports multiprogramming, virtual memory, and context switching. Our evaluation with simulations of 128-threaded kernels and 64-threaded applications shows that WiSync speeds-up synchronization substantially. Compared to using advanced conventional synchronization, WiSync attains an average speedup of nearly one order of magnitude for the kernels, and 1.12 for PARSEC and SPLASH-2.
Abadal, S.; Albert Cabellos-Aparicio; Alarcon, E.; Torrellas, J. International Conference on Architectural Support for Programming Languages and Operating Systems p. 3-17 DOI: 10.1145/2872362.2872396 Data de presentació: 2016-04 Presentació treball a congrés
In shared-memory multiprocessing, fine-grain synchronization is challenging because it requires frequent
communication. As technology scaling delivers larger manycore chips, such pattern is expected to remain costly to
support. In this paper, we propose to address this challenge by using on-chip wireless communication. Each core has
a transceiver and an antenna to communicate with all the other cores. This environment supports very low latency
global communication. Our architecture, calledWiSync, uses a per-core Broadcast Memory (BM). When a core writes
to its BM, all the other 100+ BMs get updated in less than 10 processor cycles. We also use a second wireless channel
with cheaper transfers to execute barriers efficiently. WiSync supports multiprogramming, virtual memory, and context
switching. Our evaluation with simulations of 128- threaded kernels and 64-threaded applications shows that WiSync
speeds-up synchronization substantially. Compared to using advanced conventional synchronization,WiSync attains
an average speedup of nearly one order of magnitude for the kernels, and 1.12 for PARSEC and SPLASH-2.
Multisource energy harvesters are a promising, robust alternative to power the future Internet of Nano Things (IoNT), since the network elements can maintain their operation regardless of the fact that one of its energy sources might be temporarily unavailable. Interestingly, and less explored, when the energy availability of the energy sources present large temporal variations, combining multiple energy sources reduce the overall sparsity. As a result, the performance of a multiple energy harvester powered device is significantly better compared to a single energy source even if they harvest the same amount of energy. In this context, a framework to model and characterize the area for multiple source energy harvesting (EH) powered systems is proposed. This framework takes advantage of this improvement in performance to provide the optimal amount of energy harvesters, the requirements of each energy harvester, and the required energy buffer capacity, such that the overall area or volume is minimized. On top of these results, self-tunable energy harvesters are explored as a solution and compared to multisource EH platforms. As the results show, by conducting a joint design of the energy harvesters and the energy buffer, the overall area or volume of an EH powered device can be significantly reduced.
Broadcast traditionally has been regarded as a prohibitive communication transaction in multiprocessor environments. Nowadays, such a constraint largely drives the design of architectures and algorithms all-pervasive in diverse computing domains, directly and indirectly leading to diminishing performance returns as the many-core era is approaching. Novel interconnect technologies could help revert this trend by offering, among others, improved broadcast support, even in large-scale chip multiprocessors. This article outlines the prospects of wireless on-chip communication technologies pointing toward low-latency (a few cycles) and energy-efficient broadcast (a few picojoules per bit). It also discusses the challenges and potential impact of adopting these technologies as key enablers of unconventional hardware architectures and algorithmic approaches, in the pathway of significantly improving the performance, energy efficiency, scalability, and programmability of many-core chips.
Rodriguez, A.; Marc Portoles-Comeras; Ermagan, V.; Lewis, D.; Farinacci, D.; Maino, F.; Albert Cabellos-Aparicio IEEE communications magazine Vol. 53, num. 7, p. 201-207 DOI: 10.1109/MCOM.2015.7158286 Data de publicació: 2015-07-01 Article en revista
The Locator/ID Separation Protocol (LISP) splits current IP addresses overlapping semantics of identity and location into two separate namespaces. Since its inception the protocol has gained considerable attention from both industry and academia, motivating several new use cases to be proposed. Despite its inherent control-data decoupling and the abstraction and flexibility it introduces into the network, little has been said about the role of LISP on the SDN paradigm. In this article we try to fill that gap and analyze if LISP can be used for SDN. The article presents a systematic analysis of the relevant SDN requirements and how such requirements can be fulfilled by the LISP architecture and components. This results in a set of benefits (e.g. incremental deployment, scalability, flexibility, interoperability, and inter-domain support) and drawbacks (e.g. extra headers and some initial delay) of using LISP for SDN. In order to validate the analysis, we have built and tested a prototype using the LISPmob open-source implementation.
Marc Portoles-Comeras; Josep Mangues-Bafalluy; Krendzel, A.; Requena, M.; Albert Cabellos-Aparicio IEEE communications magazine Vol. 53, num. 7, p. 184-191 DOI: 10.1109/MCOM.2015.7158284 Data de publicació: 2015-07-01 Article en revista
New architectural requirements appear with the evolution of mobile networks, such as the provisioning of multihoming or offloading. In general, this requires the design of ad hoc schemes on top of the EPS, which may be seen as an indicator of the need for a back-to-basics architectural analysis. This article analyzes the basic architectural principles of the EPS, and compares them with those of SDN and LISP. We then describe an evolutionary path for the EPS, by showing how, with slight modifications inspired by SDN and LISP, future mobile carrier networks could natively fulfill some of their flexibility and scalability requirements. The key design principles for that are: a generalized use of traffic flow templates (i.e., 5-tuple flows) for more flexible IP flow handling; a full decoupling of control and user plane for flexibility; and an on-demand (or pull-based) state setting at network nodes for scalability. Some examples are given to illustrate the thesis of this article.
Llatser, I.; Mestres, A.; Abadal, S.; Alarcon, E.; Lee, H.; Albert Cabellos-Aparicio IEEE antennas and wireless propagation letters Vol. 14, p. 350-353 DOI: 10.1109/LAWP.2014.2362194 Data de publicació: 2015-01-01 Article en revista
Graphene is enabling a plethora of applications in a wide range of fields due to its unique electrical, mechanical, and optical properties. In this context, graphene antennas are envisioned to enable ultra-high-speed wireless communication in short transmission ranges, due to both their reduced size and their radiation frequency in the terahertz band. Despite its high potential bandwidth, the terahertz band presents several phenomena that may impair the communication and reduce the achievable data rate. In this letter, the phenomenon of molecular absorption is quantitatively analyzed, evaluating the scalability of both time-and frequency-domain performance metrics with the transmission distance. The results of this analysis show that molecular absorption creates a tradeoff between the achievable throughput and the maximum transmission distance at which short-range terahertz wireless communications can successfully take place.
Llatser, I.; Albert Cabellos-Aparicio; Alarcon, E.; Jornet, J.M.; Mestres, A.; Lee, H.; Solé-Pareta, J. IEEE transactions on communications Vol. 63, num. 1, p. 324-333 DOI: 10.1109/TCOMM.2014.2379271 Data de publicació: 2015-01-01 Article en revista
Graphene is a promising material which has been proposed to build graphene plasmonic miniaturized antennas, or graphennas, which show excellent conditions for the propagation of Surface Plasmon Polariton (SPP) waves in the terahertz band. Due to their small size of just a few micrometers, graphennas allow the implementation of wireless communications among nanosystems, leading to a novel paradigm known as Graphene-enabled Wireless Communications (GWC). In this paper, an analytical framework is developed to evaluate how the channel capacity of a GWC system scales as its dimensions shrink. In particular, we study how the unique propagation of SPP waves in graphennas will impact the channel capacity. Next, we further compare these results with respect to the case when metallic antennas are used, in which these plasmonic effects do not appear. In addition, asymptotic expressions for the channel capacity are derived in the limit when the system dimensions tend to zero. In this scenario, necessary conditions to ensure the feasibility of GWC networks are found. Finally, using these conditions, new guidelines are derived to explore the scalability of various parameters, such as transmission range and transmitted power. These results may be helpful for designers of future GWC systems and networks.
Abadal, S.; Iannazzo, M.; Nemirovsky, M.; Albert Cabellos-Aparicio; Lee, H.; Alarcon, E. IEEE-ACM transactions on networking Vol. 23, num. 5 DOI: 10.1109/TNET.2014.2332271 Data de publicació: 2014-07-02 Article en revista
Networks-on-Chip (NoCs) are emerging as the way
to interconnect the processing cores and the memory within
a chip multiprocessor. As recent years have seen a significant
increase in the number of cores per chip, it is crucial to guarantee
the scalability of NoCs in order to avoid communication to
become the next performance bottleneck in multicore processors.
Among other alternatives, the concept of Wireless Network-on-
Chip (WNoC) has been proposed, wherein on-chip antennas
would provide native broadcast capabilities leading to enhanced
network performance. Since energy consumption and chip area
are the two primary constraints, this work is aimed to explore
the area and energy implications of scaling a WNoC in terms of
(a) the number of cores within the chip, and (b) the capacity of
each link in the network. To this end, an integral design space
exploration is performed, covering implementation aspects (area
and energy), communication aspects (link capacity) and networklevel
considerations (number of cores and network architecture).
The study is entirely based upon analytical models, which will
allow to benchmark the WNoC scalability against a baseline
NoC. Eventually, this investigation will provide qualitative and
quantitative guidelines for the design of future transceivers for
wireless on-chip communication.
Llatser, I.; Pascual, I.; Garralda, N.; Albert Cabellos-Aparicio; Pierobon, M.; Alarcon, E.; Solé-Pareta, J. IEEE Global Communications Conference p. 1-5 DOI: 10.1109/GLOCOM.2011.6134028 Data de presentació: 2011-12 Presentació treball a congrés
Diffusion-based molecular communication is a promising bio-inspired paradigm to implement nanonetworks, i.e., the interconnection of nanomachines. The peculiarities of the physical channel in diffusion-based molecular communication require the development of novel models, architectures and protocols for this new scenario, which need to be validated by simulation. With this purpose, we present N3Sim, a simulation framework for diffusion-based molecular communication. N3Sim allows to simulate scenarios where transmitters encode the information by releasing molecules into the medium, thus varying their local concentration. N3Sim models the movement of these molecules according to Brownian dynamics, and it also takes into account their inertia and the interactions among them. Receivers decode the information by sensing the particle concentration in their neighborhood. The benefits of N3Sim are multiple: the validation of channel models for molecular communication and the evaluation of novel modulation schemes are just a few examples.
Nano-networks are the interconnection of nano-machines and as such expand the limited capabilities of a single nano-machine. Several techniques have been proposed so far to interconnect nano-machines. For short dis-
tances (nm-mm ranges), researchers are proposing to use molecular motors and calcium signaling. For long distances (mm-m), pheromones are envisioned to transport information. In this work we propose a new mechanism for medium-range communications (nm- m): agellated bacteria. This technique is based on the transport of DNA-encoded information between emitters and receivers by means of a bacterium. We present a physical channel characterization and a simulator that, based on the previous characterization, simulates the transmission of a DNA-packet between two nano-machines.
Llatser, I.; Kremers, C.; Albert Cabellos-Aparicio; Jornet, J.M.; Alarcon, E.; Chigrin, D. International Workshop on Theoretical and Computational Nanophotonics p. 144-146 DOI: 10.1063/1.3644239 Presentació treball a congrés
Scattering of the terahertz radiation on a graphene-based nano-antenna is considered. Different electromagnetic models of graphene are discussed and applied to calculate extinction, scattering and absorption cross sections of the nano-antenna. Scattering resonances in the terahertz band are identified as longitudinal Fabry-Perot resonances of surface plasmon polaritons supported by the graphene layer. A simple while powerful model, based on the effective mode index of plasmon polaritons, is proposed to predict the antenna resonant properties. A systematic numerical study of the graphene-based nano-antenna is presented for different antenna dimensions. Finally, the potential of graphene-based nano-antennas for terahertz applications is discussed.
The Available Bandwidth (AB) of an end-to-end path is its remaining capacity and it is an important metric for several applications such as overlay routing and P2P networking. That is why many AB estimation tools have been published recently. Most of these tools use the Probe Rate Model, which requires sending packet trains at a rate matching the AB. Its main issue is that it congests the path under measurement. We present a different approach: a novel passive methodology to estimate the AB that does not introduce probe traffic. Our methodology, intended to be applied between two separate nodes, estimates the path’s AB by analyzing specific parameters of the traffic exchanged. The main challenge is that we cannot rely on any given rate of this traffic. Therefore we rely on a different model, the Utilization Model. In this paper we present our passive methodology and a tool (PKBest) based on it. We evaluate its applicability and accuracy using public NLANR data traces. Our results -more than 300Gb- show that our tool is more accurate than pathChirp, a state-of-the-art active PRM-based tool. At the best of the authors’ knowledge this is the first passive AB estimation methodology.
We have developed a LISP simulator (CoreSim). CoreSim is an Internet-scale LISP deployment simulator. It is able to replay a packet trace and simulate the behavior of a LISP Ingress Tunnel Router (ITR) and the associated Mapping Resolver, on top of a topology based on measurements performed by the iPlane infrastructure. It reports mapping lookup latency, the load imposed on each node of the MS and cache performance statistics. The simulator implements LISP-ALT and LISP-DHT. In this technical report we validate our LISP-DHT implementation, present an estimator for the latencies not reported by iPlane and discuss the architecture of CoreSim.
Albert Cabellos-Aparicio; Cuevas, R.; Domingo, J.; Cuevas, Á.; Guerrero, C. IEEE International Conference on Communications p. 1-6 DOI: 10.1109/ICC.2009.5199036 Data de presentació: 2009-06-10 Presentació treball a congrés
Wireless technologies are rapidly evolving and the users are demanding the possibility of changing its point of attachment to the Internet (i.e. default router) without breaking the IP communications. This can be achieved by using Mobile IP or NEMO, however mobile clients must forward its data packets
through its Home Agent (HA) in order to communicate with its peers. This sub-optimal route (lack of route optimization) reduces
considerably the communications performance, increases the delay and the infrastructure load. Additionally, since the HA must forward all the mobile clients’ data packets, it can become the bottleneck of such networks. In this paper we present the
fP2P-HN architecture, a P2P-based solution that allows deploying several HAes throughout the Internet. With this architecture a mobile client can select a closer HA to its topological position in order to reduce the delay of the paths
towards its peers. Furthermore it incorporates flexible HAes that, as we will see, reduce the load at these entities. The main challenge of our solution is signaling the location of the HAes in Internet. We provide an analytical model that evaluates the costs and the benefits of the fP2P-HN architecture. The model shows that the signaling grows logarithmically with the number of HAes and that the reduction is, at least, 20% (lower bound).
Wireless technologies are rapidly evolving and the users are demanding the possibility of changing its point of attachment to the Internet (i.e Access Router) without breaking the IP communications. This can be achieved by using Mobile IPv6. However mobile clients must forwards its data packets addressed towards its home network through a special entity, the Home Agent (HA). This HA is a key point when considering the performance of Mobile IPv6-based networks.