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Theses

1 to 33 of 33 results
 
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  • Co-designed solutions for overhead removal in dynamically typed languages  Open access

     Dot, G.
    Universitat Politècnica de Catalunya
    Theses
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  • Performance simulation methodologies for hardware/software co-designed processors  Open access

     Brankovic, A.
    Universitat Politècnica de Catalunya
    Theses
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  • Optimizing SIMD execution in HW/SW co-designed processors  Open access

     Kumar, R.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Reliability in the face of variability in nanometer embedded memories  Open access

     Ganapathy, S.
    Department of Electronic Engineering, Universitat Politècnica de Catalunya
    Theses
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  • Efficient hardware/software co-designed schemes for low-power processors  Open access

    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Design of a distributed memory unit for clustered microarchitectures  Open access

    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Architecture support for intrusion detection systems  Open access

    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Mitosis based speculative multithreaded architectures  Open access

    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • HW/SW mechanisms for instruction fusion, issue and commit in modern u-processors  Open access

     Deb, A.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Code optimizations for narrow bitwidth architectures  Open access

     Bhagat, I.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Architectural support for high-performing hardware transactional memory systems  Open access

    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Managing dynamic non-uniform cache architectures  Open access  awarded activity

     Lira, J.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Speeding up sequential applications on multicore platforms

     Ranjan, R.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Instruction scheduling for clustered processors based on graph techniques

     Aleta, A.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Clustered multithreaded processors

     Latorre, F.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Predicated execution and register windows for out-of-order processors  Open access

     Quiñones, E.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Single-phase instruction scheduling for clustered architectures

     Codina, J.M.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Thermal aware microarchitectures

     CHAPARRO, P.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Microarchitectural techniques to exploit repetitive computations and values  Open access

     Molina, C.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Speculative vectorization for superscalar processors  Open access

     Pajuelo, M.A.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Clustered data cache designs for VLIW processors

     Gibert, E.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Adaptive and low-complexity microarchitectures for power reduction  awarded activity

     Abella, J.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Design of clustered superscalar microarchitectures  Open access

     Parcerisa, Joan-Manuel
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Power- and a complexity-aware architectures

     Canal, R.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Speculative multithreaded processors  Open access

     Marcuello, P.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
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  • Smart memory management through locality analysis  Open access

     Sanchez, F.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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  • Speculative execution through value prediction

     González, J.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • CALMANT: un método sistemático para la ejecución de algoritmos con topología hipercubo en multicomputadores

     Diaz De Cerio, L.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
  • Multipath: Un sistema para la programación lógica  Open access

     Tubella, J.
    Department of Computer Architecture, Universitat Politècnica de Catalunya
    Theses
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