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Static task mapping for tiled chip multiprocessors with multiple voltage islands

Author
Nikitin, N.; Cortadella, J.
Type of activity
Presentation of work at congresses
Name of edition
25th International Conference on Architecture of Computing Systems
Date of publication
2012
Presentation's date
2012-03
Book of congress proceedings
Architecture of Computing Systems – ARCS 2012. 25th International Conference. Munich, Germany, February 28 – March 2, 2012 Proceedings
First page
50
Last page
62
Publisher
Springer Verlag
DOI
https://doi.org/10.1007/978-3-642-28293-5_5 Open in new window
Repository
http://hdl.handle.net/2117/16397 Open in new window
URL
http://rd.springer.com/chapter/10.1007/978-3-642-28293-5_5 Open in new window
Abstract
The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping onto general-purpose CMPs with multiple pre-defined voltage islands for power management. The CMPs are assumed to contain different classes of processing elements with multiple voltage/frequency execution modes to better cover a large range of applications. Task mapping is perform...
Citation
Nikitin, N.; Cortadella, J. Static task mapping for tiled chip multiprocessors with multiple voltage islands. A: International Conference on Architecture of Computing Systems. "Architecture of Computing Systems – ARCS 2012. 25th International Conference. Munich, Germany, February 28 – March 2, 2012 Proceedings". Springer Verlag, 2012, p. 50-62.
Keywords
Chip Multiprocessing, Extremal Optimization, Power Management, Task Mapping
Group of research
ALBCOM - Algorithms, Computational Biology, Complexity and Formal Methods

Participants