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Static task mapping for tiled chip multiprocessors with multiple voltage islands

Autor
Nikitin, N.; Cortadella, J.
Tipus d'activitat
Presentació treball a congrés
Nom de l'edició
25th International Conference on Architecture of Computing Systems
Any de l'edició
2012
Data de presentació
2012-03
Llibre d'actes
Architecture of Computing Systems – ARCS 2012. 25th International Conference. Munich, Germany, February 28 – March 2, 2012 Proceedings
Pàgina inicial
50
Pàgina final
62
Editor
Springer Verlag
DOI
https://doi.org/10.1007/978-3-642-28293-5_5 Obrir en finestra nova
Repositori
http://hdl.handle.net/2117/16397 Obrir en finestra nova
URL
http://rd.springer.com/chapter/10.1007/978-3-642-28293-5_5 Obrir en finestra nova
Resum
The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping onto general-purpose CMPs with multiple pre-defined voltage islands for power management. The CMPs are assumed to contain different classes of processing elements with multiple voltage/frequency execution modes to better cover a large range of applications. Task mapping is perform...
Citació
Nikitin, N.; Cortadella, J. Static task mapping for tiled chip multiprocessors with multiple voltage islands. A: International Conference on Architecture of Computing Systems. "Architecture of Computing Systems – ARCS 2012. 25th International Conference. Munich, Germany, February 28 – March 2, 2012 Proceedings". Springer Verlag, 2012, p. 50-62.
Paraules clau
Chip Multiprocessing, Extremal Optimization, Power Management, Task Mapping
Grup de recerca
ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals

Participants