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Transactional access to shared memory in StarSs, a task based programming model

Author
Gayatri, R.; Badia, R.M.; Ayguade, E.; Lujan, Mikel; Watson, I.
Type of activity
Presentation of work at congresses
Name of edition
18th International European Conference on Parallel and Distributed Computing
Date of publication
2012
Presentation's date
2012-08-27
Book of congress proceedings
Measurement Methodology and Tools: First European Workshop, FP7 FIRE/EULER Project: Aalborg, Denmark: May 9, 2012: revised and extended papers
First page
514
Last page
525
DOI
https://doi.org/10.1007/978-3-642-32820-6_51 Open in new window
Repository
http://hdl.handle.net/2117/19279 Open in new window
URL
http://link.springer.com/content/pdf/10.1007%2F978-3-642-32820-6_51.pdf Open in new window
Abstract
With an increase in the number of processors on a single chip, programming environments which facilitate the exploitation of par- allelism on multicore architectures have become a necessity. StarSs is a task-based programming model that enables a flexible and high level programming. Although task synchronization in StarSs is based on data flow and dependency analysis, some applications (e.g. reductions )require locks to access shared data. Transactional Memory is an alternative to lock-based syn...
Citation
Gayatri, R. [et al.]. Transactional access to shared memory in StarSs, a task based programming model. A: International Conference on Parallel Processing. "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)". Rhodes Island: 2012, p. 514-525.
Keywords
Data flow, Dependency analysis, High-level programming, Lock-based synchronization, Multicore architectures, Programming environment, Programming models, Runtimes, STM Library, Shared data, Shared memories, Single chips, Software transactional memory, Task synchronization, Task-based, Transactional memory
Group of research
CAP - High Performace Computing Group

Participants