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Setting an error detection infrastructure with low cost acoustics wave detectors

Author
Upasani, G.; Vera, F.J.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
39th International Symposium on Computer Architecture
Date of publication
2012
Presentation's date
2012-06-12
Book of congress proceedings
39th Annual International Symposium on Computer Architecture: Portland, Oregon, USA, June 9-13, 2012: proceedings
First page
333
Last page
343
Publisher
IEEE
DOI
https://doi.org/10.1109/ISCA.2012.6237029 Open in new window
Project funding
MICROARQUITECTURA I COMPILADORS (ARCO)
Repository
http://hdl.handle.net/2117/18242 Open in new window
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=6237029 Open in new window
Abstract
The continuing decrease in dimensions and operating voltage of transistors has increased their sensitivity against radiation phenomena making soft errors an important challenge in future chip multiprocessors (CMPs). Hence, new techniques for detecting errors in the logic and memories that allow meeting the desired failures-in-time (FIT) budget in CMPs are required. This paper proposes a low-cost dynamic particle strike detection mechanism through acoustic wave detectors. Our results show that ou...
Citation
Upasani, G.; Vera, F.; Gonzalez, A. Setting an error detection infrastructure with low cost acoustics wave detectors. A: International Symposium on Computer Architecture. "ISCA'12: proceedings of the 39th International Symposium on Computer Architecture". Portland, OR: IEEE, 2012, p. 333-343.
Keywords
Chip Multiprocessor, Detection mechanism, Error codes, Low costs, Memory array, Operating voltage, Soft error, Wave detectors
Group of research
ARCO - Microarchitecture and Compilers

Participants

  • Upasani, Gaurang  (author and speaker )
  • Vera Rivera, Francisco Javier  (author and speaker )
  • Gonzalez Colas, Antonio Maria  (author and speaker )