Loading...
Loading...

Go to the content (press return)

Diagnosis of interconnect full open defects in the presence of gate leakage currents

Author
Arumi, D.; Rodriguez-Montanes, R.; Figueras, J.; Eichenberger, S.; Hora, C.; Kruseman, B.
Type of activity
Journal article
Journal
IEEE transactions on computer-aided design of integrated circuits and systems
Date of publication
2013-02
Volume
32
Number
2
First page
301
Last page
312
DOI
https://doi.org/10.1109/TCAD.2012.2228269 Open in new window
Keywords
CMOS integrated circuits, Capacitance, Defects, Diagnosis, Failure analysis, Gate dielectrics, Leakage currents
Group of research
CRnE - Barcelona Research Center in Multiscale Science and Engineering
QINE - Low Power Design, Test, Verification and Security ICs

Participants