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Enhancing the efficiency and practicality of software transactional memory on massively multithreaded systems

Author
Kestor, G.
Type of activity
Theses
Other related units
Department of Computer Architecture
Defense's date
2013-03-22
URL
http://hdl.handle.net/2117/94913 Open in new window
Abstract
Chip Multithreading (CMT) processors promise to deliver higher performance by running more than one stream of instructions in parallel. To exploit CMT's capabilities, programmers have to parallelize their applications, which is not a trivial task. Transactional Memory (TM) is one of parallel programming models that aims at simplifying synchronization by raising the level of abstraction between semantic atomicity and the means by which that atomicity is achieved. TM is a promising programming mo...
Citation
Kestor, G. "Enhancing the efficiency and practicality of software transactional memory on massively multithreaded systems". Tesi doctoral, UPC, Departament d'Arquitectura de Computadors, 2013.

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