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HRC: An efficient hybrid register checkpointing for HW/SW co-designed processors

Author
Lopez, P.; Codina, J.M.; Gibert, E.; Latorre, F.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
6th Workshop on Architectural and Microarchitectural Support for Binary Translation
Date of publication
2013
Presentation's date
2013-06-24
Group of research
ARCO - Microarchitecture and Compilers

Participants

  • Lopez, Pedro  (author and speaker )
  • Codina Viñas, Josep M  (author and speaker )
  • Gibert Codina, Enric  (author and speaker )
  • Latorre, Fernando  (author and speaker )
  • Gonzalez Colas, Antonio Maria  (author and speaker )