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INFORMER: an integrated framework for early-stage memory robustness analysis

Author
Ganapathy, S.; Canal, R.; Alexandrescu, D.; Costenaro, E.; Gonzalez, A.; Rubio, A.
Type of activity
Report
Date
2013-09-30
Code
UPC-DAC-RR-ARCO-2013-23
Project funding
MICROARQUITECTURA Y COMPILADORES PARA FUTUROS PROCESADORES II
Abstract
In this paper, we propose a fullyautomated tool - INFORMER that helps high-level designers estimate memory reliability metrics rapidly and accurately. The tool relies on accurate circuit-level simulations of failure mechanisms such as ageing, soft-errors and parametric failures. The obtained statistics can then help couple low-level metrics with higher-level design choices.
Keywords
Desig-Space, Fault-Tolerance, SRAM, Tool, Yield
Group of research
ARCO - Microarchitecture and Compilers
ROBiri - IRI Robotics Group

Participants