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FPGA implementation of a PWM for a three-phase DC-AC multilevel active-clamped converter

Author
Lupon, E.; Busquets-Monge, S.; Nicolas-Apruzzese, J.
Type of activity
Journal article
Journal
IEEE transactions on industrial informatics
Date of publication
2014-05
Volume
10
Number
2
First page
1296
Last page
1306
DOI
https://doi.org/10.1109/TII.2014.2309483 Open in new window
Project funding
Advanced Wide Band Gap Semiconductor Devices for Rational Use of Energy (RUE)
Repository
http://hdl.handle.net/2117/23223 Open in new window
Abstract
With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycl...
Citation
Lupon, E.; Busquets-Monge, S.; Nicolas, J. FPGA implementation of a PWM for a three-phase DC-AC multilevel active-clamped converter. "IEEE transactions on industrial informatics", Maig 2014, vol. 10, núm. 2, p. 1296-1306.
Keywords
Field-programmable gate array (FPGA), multilevel active-clamped (MAC) converter, pulsewidth modulation (PWM)
Group of research
GREP - Power Electronics Research Group
PERC-UPC - Power Electronics Research Centre
QINE - Low Power Design, Test, Verification and Security ICs

Participants