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RMS-TM: A transactional memory benchmark for recognition, mining and synthesis applications

Author
Kestor, G.; Stipic, S.; Unsal, O.; Cristal, A.; Valero, M.
Type of activity
Presentation of work at congresses
Name of edition
4th ACM SIGPLAN Workshop on Transactional Computing
Date of publication
2009
Presentation's date
2009-02
Book of congress proceedings
TRANSACT 2009: 4th ACM SIGPLAN Workshop on Transactional Computing : Raleigh, United States, February 15, 2009
First page
1
Last page
11
URL
http://transact09.cs.washington.edu/ Open in new window
Abstract
Transactional Memory (TM) is a new concurrency control mechanism that aims to make parallel programming for Chip MultiProcessors (CMPs) easier. Recently, this topic has received substantial research attention with various software and hardware TM proposals and designs that promise to make TM both more efficient. These proposals are usually analyzed using existing TM-benchmarks, however the per- formance evaluation of TM proposals would be more solid if it included more representative benchmarks,...
Keywords
BioBench, MineBench, Transactional memory, Workload characterization
Group of research
CAP - High Performace Computing Group

Participants