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RMS-TM: A transactional memory benchmark for recognition, mining and synthesis applications

Autor
Kestor, G.; Stipic, S.; Unsal, O.; Cristal, A.; Valero, M.
Tipus d'activitat
Presentació treball a congrés
Nom de l'edició
4th ACM SIGPLAN Workshop on Transactional Computing
Any de l'edició
2009
Data de presentació
2009-02
Llibre d'actes
TRANSACT 2009: 4th ACM SIGPLAN Workshop on Transactional Computing : Raleigh, United States, February 15, 2009
Pàgina inicial
1
Pàgina final
11
URL
http://transact09.cs.washington.edu/ Obrir en finestra nova
Resum
Transactional Memory (TM) is a new concurrency control mechanism that aims to make parallel programming for Chip MultiProcessors (CMPs) easier. Recently, this topic has received substantial research attention with various software and hardware TM proposals and designs that promise to make TM both more efficient. These proposals are usually analyzed using existing TM-benchmarks, however the per- formance evaluation of TM proposals would be more solid if it included more representative benchmarks,...
Paraules clau
BioBench, MineBench, Transactional memory, Workload characterization
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions

Participants