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J-DSE: Joint software and hardware design space exploration for application specific processors

Author
Paolieri, M.; Bonesana, I.; Gioiosa, R.; Valero, M.
Type of activity
Presentation of work at congresses
Name of edition
The 3rd Workshop on Programmability Issues for Multi-Core Computers
Date of publication
2010
Presentation's date
2010-01
Book of congress proceedings
Third Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG-3): January 24, 2010, Pisa, Italy
Abstract
Modern embedded systems’ applications are characterized by a high demand of computing power but classical embedded systems’ constraints (power, area, etc.) still hold. The solution to this new challenge comes from the use of Multi-Core in embedded systems. However, providing high performance with a limited power consumption is still an open problem especially considering the rapid increase of design complexity and manufacturing cost. The use of customizable cores (like FPGAs and ASIPs) that ...
Group of research
CAP - High Performace Computing Group

Participants

  • Paolieri, Marco  (author and speaker )
  • Bonesana, I.  (author and speaker )
  • Gioiosa, Roberto  (author and speaker )
  • Valero Cortes, Mateo  (author and speaker )