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Architectural support for fair reader-writer locking

Author
Vallejo, E.; Beivide, R.; Cristal, A.; Harris, T.; Vallejo, F.; Unsal, O.; Valero, M.
Type of activity
Presentation of work at congresses
Name of edition
43rd Annual IEEE/ACM International Symposium on Microarchitecture
Date of publication
2010
Presentation's date
2010-12
Book of congress proceedings
The 43rd Annual IEEE/ACM International Symposium on Microarchitecture: Atlanta, Georgia, 4-8 December 2010: proceedings
First page
275
Last page
286
DOI
https://doi.org/10.1109/MICRO.2010.12 Open in new window
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5695543 Open in new window
Abstract
Many shared-memory parallel systems use lock-based synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are inefficient either in memory usage, lock transfer time, or both. Proposed hardware locking mechanisms are either too specific (for example, requiring static assignment of threads to cores and vice-versa), support a limited number of concurrent locks, require tag values to be associated with every memory location, rely on the low...
Keywords
Fairness, Lock control unit, Reader-writer locks
Group of research
CAP - High Performace Computing Group

Participants

  • Vallejo, Enrique  (author and speaker )
  • Beivide Palacio, Ramon  (author and speaker )
  • Cristal Kestelman, Adrian  (author and speaker )
  • Harris, Tim  (author and speaker )
  • Vallejo, Fernando  (author and speaker )
  • Unsal, Osman Sabri  (author and speaker )
  • Valero Cortes, Mateo  (author and speaker )