Loading...
Loading...

Go to the content (press return)

PVMC: programmable vector memory controller

Author
Hussain, T.; Palomar, O.; Unsal, O.; Cristal, A.; Ayguade, E.; Valero, M.
Type of activity
Presentation of work at congresses
Name of edition
25th IEEE International Conference on Application-Specific Systems, Architectures and Processors
Date of publication
2014
Presentation's date
2014-06-18
Book of congress proceedings
2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors: (ASAP 2014): 18-20 June 2014: Zurich, Switzerland
First page
240
Last page
247
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/ASAP.2014.6868668 Open in new window
Repository
http://hdl.handle.net/2117/24680 Open in new window
URL
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6868668 Open in new window
Abstract
In this work, we propose a Programmable Vector Memory Controller (PVMC), which boosts noncontiguous vector data accesses by integrating descriptors of memory patterns, a specialized local memory, a memory manager in hardware, and multiple DRAM controllers. We implemented and validated the proposed system on an Altera DE4 FPGA board. We compare the performance of our proposal with a vector system without PVMC as well as a scalar only system. When compared with a baseline vector system, the result...
Citation
Hussain, T. [et al.]. PVMC: Programmable Vector Memory Controller. A: International Conference on Application-Specific Systems, Architectures and Processors. "2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors: (ASAP 2014): 18-20 June 2014: Zurich, Switzerland". Zurich: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 240-247.
Keywords
Baseline vectors, Computer architecture, Controllers, Dynamic random access storage, FPGA boards, Local memory, Memory controller, Memory manager, Memory patterns, Vector data, Vector systems, Vectors
Group of research
CAP - High Performace Computing Group

Participants

Attachments