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Advanced pattern based memory controller for FPGA based HPC applications

Author
Hussain, T.; Palomar, O.; Unsal, O.; Cristal, A.; Ayguade, E.; Valero, M.
Type of activity
Presentation of work at congresses
Name of edition
International Conference on High Performance Computing & Simulation
Date of publication
2014
Presentation's date
2014-07
Book of congress proceedings
Proceedings of the 2014 International Conference on High Performance Computing and Simulation: July 21-25, 2014, Bologna, Italy
First page
287
Last page
294
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/HPCSim.2014.6903697 Open in new window
Repository
http://hdl.handle.net/2117/25074 Open in new window
URL
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6903697 Open in new window
Abstract
The ever-increasing complexity of high-performance computing applications limits performance due to memory constraints in FPGAs. To address this issue, we propose the Advanced Pattern based Memory Controller (APMC), which supports both regular and irregular memory patterns. The proposed memory controller systematically reduces the latency faced by processors/accelerators due to irregular memory access patterns and low memory bandwidth by using a smart mechanism that collects and stores the diffe...
Citation
Hussain, T. [et al.]. Advanced pattern based memory controller for FPGA based HPC applications. A: International Conference on High Performance Computing & Simulation. "Proceedings of the 2014 International Conference on High Performance Computing and Simulation: July 21-25, 2014, Bologna, Italy". Bologna: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 287-294.
Keywords
Memory controller
Group of research
CAP - High Performace Computing Group

Participants