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Variability impact on on-chip memory data paths

Author
Amat, Esteve; Calomarde, A.; Canal, R.; Rubio, A.
Type of activity
Presentation of work at congresses
Name of edition
5th European Workshop on CMOS Variability
Date of publication
2014
Presentation's date
2014
Book of congress proceedings
5th European Workshop on CMOS Variability
DOI
https://doi.org/10.1109/VARI.2014.6957086 Open in new window
Repository
http://hdl.handle.net/2117/26568 Open in new window
Abstract
Process variations have a large impact on device and circuit reliability and performance. Few studies are focused on their impact on more complex systems, as for example their influence in a data path. In our study, the impact of variations in the memory cell block is the largest measured, as it is usually designed with the minimum device dimensions. Moreover, we observe a significant influence of the device type (p/nMOS) used to implement the memory cell in terms of delay and variability robust...
Citation
Amat, Esteve [et al.]. Variability impact on on-chip memory data paths. A: European Workshop on CMOS Variability. "5th European Workshop on CMOS Variability". 2014.
Keywords
DRAM, delay, temperature, variability
Group of research
HIPICS - High Performance Integrated Circuits and Systems
VIRTUOS - Virtualisation and Operating Systems

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