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A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM

Author
Darus, R.; Pou, J.; Konstantinou, G.; Ceballos, S.; Picas, R.; Agelidis, V.
Type of activity
Journal article
Journal
IEEE transactions on power electronics
Date of publication
2015-08-01
Volume
30
Number
8
First page
4119
Last page
4127
DOI
https://doi.org/10.1109/TPEL.2014.2359005 Open in new window
Repository
http://hdl.handle.net/2117/76678 Open in new window
Abstract
This paper introduces a low complexity implementation of the voltage balancing algorithm aiming to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). The proposed algorithm features a relatively simple implementation without any conditional execution requirements and is easily expandable regardless of the number of submodules (SMs). Two modulation techniques are evaluated, namely the staircase modulation and the phase-disposition pulse width modulation (...
Citation
Darus, R., Pou, J., Konstantinou, G., Ceballos, S., Picas, R., Agelidis, V. A modified voltage balancing sorting algorithm for the modular multilevel converter: Evaluation for staircase and phase-disposition PWM. "IEEE transactions on power electronics", 01 Agost 2015, núm. 8, p. 4119-4127.
Keywords
Capacitor voltage balancing, FUNDAMENTAL SWITCHING FREQUENCY, SYSTEM, modular multilevel converter (MMC), modulation technique, pulse width modulation
Group of research
Electromagnetic Compatibility (EMC); Widebandgap (WBG); Internal Activity; Feature Selective Validation (FSV); Spread Spectrum modulation; Reliability; Multilevel Converters; Fault detection;

Participants

  • Darus, Rosheila  (author)
  • Pou Felix, Josep  (author)
  • Konstantinou, Georgios  (author)
  • Ceballos Recio, Salvador  (author)
  • Picas Prat, Ricard  (author)
  • Agelidis, Vassilios  (author)

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