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An accurate cost model for guiding data locality transformations

Autor
Vera, F.J.; Abella, J.; Llosa, J.; Gonzalez, A.
Tipus d'activitat
Article en revista
Revista
ACM transactions on programming languages and systems
Data de publicació
2005-09
Volum
27
Número
5
Pàgina inicial
946
Pàgina final
987
DOI
https://doi.org/10.1145/1086642.1086646 Obrir en finestra nova
URL
http://dl.acm.org/citation.cfm?id=1086646&CFID=787966878&CFTOKEN=39892905 Obrir en finestra nova
Resum
Caches have become increasingly important with the widening gap between main memory and processor speeds. Small and fast cache memories are designed to bridge this discrepancy. However, they are only effective when programs exhibit sufficient data locality.The performance of the memory hierarchy can be improved by means of data and loop transformations. Tiling is a loop transformation that aims at reducing capacity misses by shortening the reuse distance. Padding is a data layout transformation ...
Paraules clau
Cache memories, Genetic algorithms, Padding, Tiling
Grup de recerca
ARCO - Microarquitectura i Compiladors
CAP - Grup de Computació d'Altes Prestacions

Participants