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An accurate cost model for guiding data locality transformations

Author
Vera, F.J.; Abella, J.; Llosa, J.; Gonzalez, A.
Type of activity
Journal article
Journal
ACM transactions on programming languages and systems
Date of publication
2005-09
Volume
27
Number
5
First page
946
Last page
987
DOI
https://doi.org/10.1145/1086642.1086646 Open in new window
URL
http://dl.acm.org/citation.cfm?id=1086646&CFID=787966878&CFTOKEN=39892905 Open in new window
Abstract
Caches have become increasingly important with the widening gap between main memory and processor speeds. Small and fast cache memories are designed to bridge this discrepancy. However, they are only effective when programs exhibit sufficient data locality.The performance of the memory hierarchy can be improved by means of data and loop transformations. Tiling is a loop transformation that aims at reducing capacity misses by shortening the reuse distance. Padding is a data layout transformation ...
Keywords
Cache memories, Genetic algorithms, Padding, Tiling
Group of research
ARCO - Microarchitecture and Compilers
CAP - High Performace Computing Group

Participants