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Limits of instruction level parallelism with data value speculation

Author
González, J.; Gonzalez, A.
Type of activity
Journal article
Journal
Lecture notes in computer science
Date of publication
1998-06
Volume
1573
First page
452
Last page
465
DOI
https://doi.org/10.1007/10703040_34 Open in new window
URL
http://link.springer.com/chapter/10.1007/10703040_34 Open in new window
Abstract
Increasing the instruction level parallelism (ILP) is one of the key issues to boost the performance of future generation processors. Current processor organizations include different mechanisms to overcome the limitations imposed by name and control dependencies but no mechanisms targeting to data dependencies. Thus, these dependencies will become one of the main bottlenecks in the future. Data value speculation is gaining popularity as a mechanism to overcome the limitations imposed by data de...
Keywords
Multi-threading, Parallel architectures, Performance evaluation
Group of research
ARCO - Microarchitecture and Compilers

Participants